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FEATURES
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LTC3577-3/LTC3577-4 Highly Integrated Portable Product PMIC DESCRIPTION
The LTC(R)3577-3/LTC3577-4 are highly integrated power management ICs for single cell Li-Ion/Polymer battery applications. It includes a PowerPath manager with automatic load prioritization, a battery charger, an ideal diode, input overvoltage protection and numerous other internal protection features. The LTC3577-3/LTC3577-4 are designed to accurately charge from current limited supplies such as USB by automatically reducing charge current such that the sum of the load current and the charge current does not exceed the programmed input current limit (100mA or 500mA modes). The LTC3577-3/LTC3577-4 reduce the battery voltage at elevated temperatures to improve safety and reliability. The three step-down switching regulators and two LDOs provide a wide range of available supplies. The LTC3577-3/LTC3577-4 also include a pushbutton input to control power sequencing and system reset. The onboard LED backlight boost circuitry can drive up to 10 series LEDs and includes versatile digital dimming via the I2C input. The LTC3577-3/LTC3577-4 are designed to support the SiRF Atlas IV processor and has pushbutton timing and sequencing different from other LTC3577 versions. The LTC3577-3/LTC3577-4 are available in a low profile 4mm x 7mm x 0.75mm 44-pin QFN package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6522118, 6700364, 7511390, 5481178, 6580258. Other patents pending.
Full Featured Li-Ion/Polymer Charger/PowerPathTM Control with Instant-On Operation Triple Adjustable High Efficiency Step-Down Switching Regulators (800mA, 500mA, 500mA IOUT) I2C Adjustable SW Slew Rates for EMI Reduction High Temperature Battery Voltage Reduction Improves Safety and Reliability Overvoltage Protection Controller for USB (VBUS)/Wall Inputs Provide Protection to 30V Integrated 40V Series LED Back Light Driver with 60dB Brightness Control and Gradation via I2C 1.5A Maximum Charge Current with Thermal Limiting Battery Float Voltage: 4.2V (LTC3577-3) 4.1V (LTC3577-4) Pushbutton ON/OFF Control with System Reset Dual 150mA Current Limited LDOs Start-Up Timing Compatible with SiRF Atlas IV Processor Small 4mm x 7mm 44-pin QFN package
APPLICATIONS
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PNDs, DMB/DVB-H, Digital/Satellite Radio, Media Players Portable Industrial/Medical Products Other USB-Based Handheld Products
TYPICAL APPLICATION
5V ADAPTER USB
10-LED Driver Efficiency
OPTIONAL 100mA/500mA 1000mA VOUT CC/CV CHARGER LTC3577-3/LTC3577-4 2 I2 C PORT NTC EFFICIENCY (%) OVERVOLTAGE PROTECTION CHARGE 0V 90 80 70 60 MAX PWM 50 40 30 20 10 0 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 LED CURRENT (A) 1.E-01 CONSTANT CURRENT
+
SINGLE CELL Li-Ion 0.8V to 3.6V/150mA 0.8V to 3.6V/150mA 4 TO 10 LED BOOST 0.8V to 3.6V/800mA 0.8V to 3.6V/500mA 0.8V to 3.6V/500mA
DUAL LDO REGULATORS
LED BACKLIGHT WITH DIGITALLY CONTROLLED DIMMING PUSHBUTTON CONTROL TRIPLE HIGH EFFICIENCY STEP-DOWN SWITCHING REGULATORS
PB
357734 TA01a
357734 TA01b
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LTC3577-3/LTC3577-4 TABLE OF CONTENTS
FEATURES....................................................................................................................................................................1 APPLICATIONS ............................................................................................................................................................1 TYPICAL APPLICATION ................................................................................................................................................1 DESCRIPTION ..............................................................................................................................................................1 ABSOLUTE MAXIMUM RATINGS .................................................................................................................................3 ORDER INFORMATION ................................................................................................................................................3 PIN CONFIGURATION ..................................................................................................................................................3 ELECTRICAL CHARACTERISTICS ................................................................................................................................4 TYPICAL PERFORMANCE CHARACTERISTICS ..........................................................................................................10 PIN FUNCTIONS.........................................................................................................................................................16 BLOCK DIAGRAM ......................................................................................................................................................19 OPERATION ...............................................................................................................................................................20 PowerPath OPERATION .........................................................................................................................................20 LOW DROPOUT LINEAR REGULATOR OPERATION...............................................................................................29 STEP-DOWN SWITCHING REGULATOR OPERATION ............................................................................................30 LED BACKLIGHT/BOOST OPERATION ...................................................................................................................34 I2C OPERATION .....................................................................................................................................................37 PUSHBUTTON INTERFACE OPERATION ................................................................................................................43 LAYOUT AND THERMAL CONSIDERATIONS .........................................................................................................47 TYPICAL APPLICATION ..............................................................................................................................................49 PACKAGE DESCRIPTION ............................................................................................................................................51 RELATED PARTS ........................................................................................................................................................52
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LTC3577-3/LTC3577-4 ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2, 3)
PIN CONFIGURATION
TOP VIEW 44 CHRG 43 CLPROG 42 EXTPWR 41 ACPR 40 VBUS 39 VOUT 38 BAT ILIM0 1 ILIM1 2 LED_FS 3 WALL 4 SW3 5 VIN3 6 FB3 7 OVSENS 8 LED_OV 9 DVCC 10 SDA 11 SCL 12 OVGATE 13 PWR_ON 14 ON 15 45 37 IDGATE 36 PROG 35 NTC 34 NTCBIAS 33 SW1 32 VIN12 31 SW2 30 VINLD02 29 LDO2 28 LDO1 27 VINLDO1 26 FB1 25 FB2 24 LDO2_FB 23 LDO1_FB UFF PACKAGE 44-LEAD (7mm 4mm) PLASTIC QFN TJMAX = 110C, JA = 45C/W EXPOSED PAD (PIN 45) IS GND, MUST BE SOLDERED TO PCB
VSW ............................................................ -0.3V to 45V VBUS, VOUT , VIN12, VIN3, VINLDO1, VINLDO2, WALL t < 1ms and Duty Cycle < 1% .................. -0.3V to 7V Steady State............................................. -0.3V to 6V CHRG, BAT, LED_FS, LED_OV, PWR_ON, EXTPWR, PBSTAT, PGOOD, FB1, FB2, FB3, LDO1, LDO1_FB, LDO2, LDO2_FB, DVCC, SCL, SDA, EN3.................. -0.3V to 6V NTC, PROG, CLPROG, ON, ILIM0, ILIM1 (Note 4)............................................-0.3V to VCC + 0.3V IVBUS, IVOUT , IBAT.........................................................2A ISW3 (Continuous) ................................................850mA ISW2, ISW1 (Continuous) .......................................600mA ILDO1, ILDO2 (Continuous).....................................200mA ICHRG, IACPR, IEXTPWR, IPBSTAT, IPGOOD ....................75mA IOVSENS...................................................................10mA ICLPROG, IPROG, ILED_FS, ILED_OV ...............................2mA Maximum Junction Temperature........................... 110C Operating Temperature Range.................. -40C to 85C Storage Temperature Range................... -65C to 125C
ORDER INFORMATION
LEAD FREE FINISH LTC3577EUFF-3#PBF LTC3577EUFF-4#PBF TAPE AND REEL LTC3577EUFF-3#TRPBF LTC3577EUFF-4#TRPBF PART MARKING 35773 35774 PACKAGE DESCRIPTION 44-Lead (4mm x 7mm) Plastic QFN 44-Lead (4mm x 7mm) Plastic QFN TEMPERATURE RANGE -40C to 85C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
PBSTAT 16 EN3 17 SW 18 SW 19 SW 20 PGOOD 21 ILED 22
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LTC3577-3/LTC3577-4 ELECTRICAL CHARACTERISTICS
SYMBOL VBUS IBUS_LIM PARAMETER Input Supply Voltage Total Input Current (Note 5) ILIM0 = 5V, ILIM1 = 5V (1x Mode) ILIM0 = 0V, ILIM1 = 0V (5x Mode) ILIM0 = 0V, ILIM1 = 5V (10x Mode) 1x, 5x, 10x Modes ILIM0 = 5V, ILIM1 = 0V (Suspend Mode)
l l l
Power Manager. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VBUS = 5V, VBAT = 3.8V, ILIM0 = ILIM1 = 5V, WALL = 0V, VINLDO2 = VINLOD1 = VIN12 = VIN3 = VOUT, RPROG = 2k, RCLPROG = 2.1k, unless otherwise noted.
CONDITIONS MIN 4.35 80 450 900 90 475 950 0.42 0.05 1000 1x Mode 5x Mode 10x Mode Rising Threshold Falling Threshold 3.5 0.2 1.0 2.0 3.8 3.7 50 -50 200 3.9 100 TYP MAX 5.5 100 500 1000 0.1 UNITS V mA mA mA mA mA mA/mA V V V V V mV mV m Input Power Supply
IBUSQ hCLPROG VCLPROG
Input Quiescent Current, POFF State Ratio of Measured VBUS Current to CLPROG Program Current CLPROG Servo Voltage in Current Limit VBUS Undervoltage Lockout
VUVLO VDUVLO RON_ILIM Battery Charger VFLOAT
VBUS to VOUT Differential Undervoltage Rising Threshold Lockout Falling Threshold Input Current Limit Power FET OnResistance (Between VBUS and VOUT) VBAT Regulated Output Voltage LTC3577-3 LTC3577-3, 0 TA 85C LTC3577-4 LTC3577-4, 0 TA 85C 4.179 4.165 4.079 4.065
l l l
4.200 4.200 4.1 4.1 1000 500 200 6 55 130 1.000 0.100 1000
4.221 4.235 4.121 4.135 1050 535 220 27 100 200
V V V V mA mA mA A A A V V mA/mA
ICHG
Constant-Current Mode Charge Current RPROG = 1k, Input Current Limit = 2A IC Not in Thermal Limit RPROG = 2k, Input Current Limit = 1A RPROG = 5k, Input Current Limit = 0.4A Battery Drain Current, POFF State, Buck3 Disabled, No Load (Note 15) Battery Drain Current, PON State, Buck3 Enabled (Notes 10, 15) PROG Pin Servo Voltage PROG Pin Servo Voltage in Trickle Charge Ratio of IBAT to PROG Pin Current Trickle Charge Current Trickle Charge Rising Threshold Trickle Charge Falling Threshold Recharge Battery Threshold Voltage Safety Timer Termination Period Bad Battery Termination Time Battery Charger Power FET OnResistance (Between VOUT and BAT) Junction Temperature in Constant Temperature Mode VBAT < VTRKL VBAT Rising VBAT Falling Threshold Voltage Relative to VFLOAT Timer Starts when VBAT = VFLOAT - 50mV VBAT < VTRKL VBAT = 4.3V, Charger Time Out VBUS = 0V VBUS = 0V, IOUT = 0A, No Load On Supplies, Burst Mode Operation VBAT > VTRKL VBAT < VTRKL
950 465 180
IBATQ_OFF IBATQ_ON VPROG,CHG VPROG,TRKL hPROG ITRKL VTRKL VRECHRG tTERM tBADBAT hC/10 RON_CHG TLIM
40 2.5 -75 3.2 0.4 0.085
50 2.9 2.75 -100 4 0.5 0.1 200 110
60 3.0 -125 4.8 0.6 0.11
mA V V mV Hour Hour mA/mA m C
End-of-Charge Indication Current Ratio (Note 6)
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LTC3577-3/LTC3577-4
Power Manager. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VBUS = 5V, VBAT = 3.8V, ILIM0 = ILIM1 = 5V, WALL = 0V, VINLDO2 = VINLOD1 = VIN12 = VIN3 = VOUT, RPROG = 2k, RCLPROG = 2.1k, unless otherwise noted.
SYMBOL VCOLD VHOT VTOO_HOT INTC IBAT2HOT VBAT2HOT Ideal Diode VFWD RDROPOUT IMAX VOVCUTOFF VOVGATE IOVSENSQ tRISE VACPR VW VW IQWALL Forward Voltage Detection Diode On-Resistance, Dropout Diode Current Limit Overvoltage Protection Threshold OVGATE Output Voltage OVSENS Quiescent Current OVGATE Time to Reach Regulation ACPR Pin Output High Voltage ACPR Pin Output Low Voltage Absolute Wall Input Threshold Voltage Differential Wall Input Threshold Voltage Wall Operating Quiescent Current IOUT = 10mA IOUT = 200mA (Note 7) Rising Threshold, ROVSENS = 6.2k Input Below VOVCUTOFF Input Above VOVCUTOFF VOVSENS = 5V COVGATE = 1nF IACPR = 0.1mA IACPR = 1mA VWALL Rising VWALL Falling VWALL - VBAT Falling VWALL - VBAT Rising IWALL + IVOUT , IBAT = 0mA, WALL = VOUT = 5V ILIM0, ILIM1 ILIM0, ILIM1 ILIM0, ILIM1; VPIN = 1V ICHRG = 10mA VBAT = 4.5V, VCHRG = 5V 1.2 2 0.15 0 0.4 1 VOUT - 0.3 6.10 5 15 200 3.6 6.35 1.88 * VOVSENS 0 40 2.5 VOUT 0 4.3 3.2 25 75 440 6.70 12 25 mV m A V V V A ms V V V V mV mV A PARAMETER Cold Temperature Fault Threshold Voltage Hot Temperature Fault Threshold Voltage NTC Discharge Threshold Voltage NTC Leakage Current BAT Discharge Current BAT Discharge Threshold CONDITIONS Rising NTC Voltage Hysteresis Falling NTC Voltage Hysteresis Falling NTC Voltage Hysteresis VNTC = VBUS = 5V VBAT = 4.1V, NTC < VTOO_HOT IBAT < 0.1mA, NTC < VTOO_HOT MIN 75 34 24.5 -50 170 3.9 TYP 76 1.3 35 1.3 25.5 50 MAX 77 36 26.5 50 UNITS %VNTCBIAS %VNTCBIAS %VNTCBIAS %VNTCBIAS %VNTCBIAS mV nA mA V NTC, Battery Discharge Protection
ELECTRICAL CHARACTERISTICS
Overvoltage Protection
Wall Adapter and High Voltage Buck Output Control 0.3 4.45
3.1 0
100
Logic (ILIM0, ILIM1 and CHRG) VIL VIH IPD VCHRG ICHRG Input Low Voltage Input High Voltage Static Pull-Down Current CHRG Pin Output Low Voltage CHRG Pin Input Current 0.4 V V A V A
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LTC3577-3/LTC3577-4 ELECTRICAL CHARACTERISTICS
SYMBOL DVCC IDVCC VDVCC,UVLO VIH VIL IIH IIL VOL fSCL tLOW tHIGH tBUF tHD,STA tSU,STA tSU,STO tHD,DATO tHD,DATI tSU,DAT tSP PARAMETER Input Supply Voltage DVCC Supply Current DVCC UVLO Input HIGH Voltage Input LOW Voltage Input HIGH Leakage Current Input LOW Leakage Current SDA Output LOW Voltage SCL Clock Frequency LOW Period of the SCL Clock HIGH Period of the SCL Clock Bus Free Time Between Stop and Start Condition Hold Time After (Repeated) Start Condition Setup Time for a Repeated Start Condition Stop Condition Set-Up Time Output Data Hold Time Input Data Hold Time Data Set-Up Time Input Spike Suppression Pulse Width 1.3 0.6 1.3 0.6 0.6 0.6 0 0 100 50 900 SDA = SCL = DVCC = 5.5V SDA = SCL = 0V, DVCC = 5.5V ISDA = 3mA 30 -1 -1 SCL = 400kHz SCL = SDA = 0kHz 1.0 50 50 1 1 0.4 400 70
I2C Interface. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. DVCC = 3.3V, VOUT = 3.8V, unless otherwise noted.
CONDITIONS MIN 1.6 TYP MAX 5.5 10 1 UNITS V A A V %DVCC %DVCC A A V kHz s s s s s s ns ns ns ns
Timing Characteristics (Note 8) (All Values are Referenced to VIH and VIL)
LED Boost Switching Regulator. The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25C. VIN3 = VOUT = 3.8V, ROV = 10M, RLED_FS = 20k, boost regulator disabled unless otherwise noted.
SYMBOL VIN3, VOUT IVOUT_LED VLED_OV ILIM ILED(FS) ILED(DIM) RNSWON INSWOFF fOSC VLED_FS ILED_OV DBOOST VBOOSTFB PARAMETER Operating Supply Range Operating Quiescent Current Shutdown Quiescent Current LED Overvoltage Threshold Peak NMOS Switch Current ILED Pin Full-Scale Operating Current ILED Pin Full-Scale Dimming Range RDS(ON) of NMOS Switch NMOS Switch Off Leakage Current Oscillator Frequency LED_FS Pin Voltage LED_OV Pin Current Maximum Duty Cycle Boost Mode Feedback Voltage CONDITIONS (Note 9) (Notes 10, 14) LED_OV Rising LED_OV Falling
l
MIN 2.7
TYP 560 0.01
MAX 5.5
UNITS V A A V V mA mA dB m A MHz mV A % mV
0.6 800 18
64 Steps VSW = 5.5V
l l
0.95 780 3.8 775
ILED = 0
l
1.0 0.85 1000 20 60 240 0.01 1.125 800 4 97 800
1.25 1200 22
1 1.3 820 4.2 825
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LTC3577-3/LTC3577-4 ELECTRICAL CHARACTERISTICS
SYMBOL VIN12, VIN3 VOUT UVLO PARAMETER Input Supply Voltage VOUT Falling VOUT Rising Oscillator Frequency Pulse-Skipping Mode Input Current Burst Mode Input Current Shutdown Input Current ILIM3 VFB3 IFB3 D3 RP3 RN3 RSW3_PD VIL,EN3 VIH,EN3 IVIN12Q Peak PMOS Current Limit Feedback Voltage FB3 Input Current Max Duty Cycle RDS(ON) of PMOS RDS(ON) of NMOS SW3 Pull-Down in Shutdown EN3 Input Low Voltage EN3 Input High Voltage Pulse-Skipping Mode Input Current Burst Mode Input Current Shutdown Input Current ILIM2 VFB2 IFB2 D2 RP2 RN2 RSW2_PD IVIN12Q Peak PMOS Current Limit Feedback Voltage FB2 Input Current Max Duty Cycle RDS(ON) of PMOS RDS(ON) of NMOS SW2 Pull-Down in Shutdown Pulse-Skipping Mode Input Current Burst Mode Input Current Shutdown Input Current ILIM1 VFB1 IFB1 D1 RP1 RN1 RSW1_PD Peak PMOS Current Limit Feedback Voltage FB1 Input Current Max Duty Cycle RDS(ON) of PMOS RDS(ON) of NMOS SW1 Pull-Down in Shutdown (Note 7) Pulse Skip Mode Burst Mode Operation (Note 10) FB1 = 0V ISW1 = 100mA ISW1 = -100mA POFF State
l l
Step-Down Switching Regulators. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VOUT = VIN12 = VIN3 = 3.8V, all regulators enabled unless otherwise noted.
CONDITIONS (Note 9) VIN12 and VIN3 Connected to VOUT Through Low Impedance. Switching Regulators are Disabled Below VOUT UVLO
l
MIN 2.7 2.5
TYP
MAX 5.5
UNITS V V V MHz A
Step-Down Switching Regulators (Buck1, Buck2 and Buck3) 2.7 2.8 2.25 100 20 0.01 1000
l l
2.9 2.59
fOSC IVIN3Q
1.91 (Note 10) (Note 10) EN3 = 0 (Note 7) Pulse-Skipping Mode Burst Mode Operation (Note 10) FB3 = 0V 0.78 0.78 -0.05 100
800mA Step-Down Switching Regulator 3 (Buck3-Enabled via EN3, Disabled in PON and POFF States) 35 1 1700 0.82 0.824 0.05 0.3 0.4 EN3 = 0 1.2 (Note 10) (Note 10) POFF State (Note 7) Pulse-Skipping Mode Burst Mode Operation (Note 10) FB2 = 0V ISW2 = 100mA ISW2 = -100mA POFF State (Note 10) (Note 10) 650 0.78 0.78 -0.05 100 0.6 0.6 10
l l
A A mA V V A % k
1400 0.8 0.8
10 0.4
V V
500mA Step-Down Switching Regulator 2 (Buck2-Pushbutton Enabled, Third in Sequence) 100 20 0.01 650 0.78 0.78 -0.05 100 0.6 0.6 10 100 20 0.01 900 0.8 0.8 1 1200 0.82 0.824 0.05 900 0.8 0.8 1 1200 0.82 0.824 0.05 A A A mA V V A % k A A A mA V V A % k
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500mA Step-Down Switching Regulator 1 (Buck1-Pushbutton Enabled, Second in Sequence)
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LTC3577-3/LTC3577-4 ELECTRICAL CHARACTERISTICS
SYMBOL VINLDO1 VOUT_UVLO VLDO1_FB PARAMETER Input Voltage Range VOUT Falling VOUT Rising LDO1_FB Regulated Feedback Voltage LDO1_FB Line Regulation (Note 11) LDO1_FB Load Regulation (Note 11) ILDO1_OC ILDO1_SC VDROP1 Available Output Current Short-Circuit Output Current Dropout Voltage (Note 12) ILDO1 = 150mA, VINLDO1 = 3.6V ILDO1 = 150mA, VINLDO1 = 2.5V ILDO1 = 75mA, VINLDO1 = 1.8V LDO1 Disabled -50 VINLDO2 VOUT + 0.3V LDO2 is Disabled Below VOUT UVLO ILDO2 = 1mA ILDO2 = 1mA, VIN = 1.65V to 5.5V ILDO2 = 1mA to 150mA
l l l
LDO Regulators. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VINLDO1 = VINLDO2 = VOUT = 3.8V, LDO1 and LDO2 enabled unless otherwise noted.
CONDITIONS VINLDO1 VOUT + 0.3V LDO1 is Disabled Below VOUT UVLO ILDO1 = 1mA ILDO1 = 1mA, VIN = 1.65V to 5.5V ILDO1 = 1mA to 150mA
l l l
MIN 1.65 2.5 0.78
TYP
MAX 5.5
UNITS V V V V mV/V V/mA mA mA
LDO Regulator 1 (LDO1-Always On) 2.7 2.8 0.8 0.4 5 150 270 160 200 170 10 50 5.5 2.7 2.8 0.8 0.4 5 150 270 ILDO2 = 150mA, VINLDO2 = 3.6V ILDO2 = 150mA, VINLDO2 = 2.5V ILDO1 = 75mA, VINLDO1 = 1.8V LDO2 Disabled -50 160 200 170 14 50 260 320 280 2.9 0.82 260 320 280
2.9 0.82
mV mV mV k nA V V V V mV/V V/mA mA mA mV mV mV k nA
RLDO1_PD ILDO_FB1 VINLDO2 VOUT_UVLO VLDO2_FB
Output Pull-Down Resistance in Shutdown LDO_FB1 Input Current Input Voltage Range VOUT Falling VOUT Rising LDO2_FB Regulated Output Voltage LDO2_FB Line Regulation (Note 11) LDO2_FB Load Regulation (Note 11)
LDO Regulator 2 (LDO2-Pushbutton Enabled, First in Sequence) 1.65 2.5 0.78
ILDO2_OC ILDO2_SC VDROP2
Available Output Current Short-Circuit Output Current Dropout Voltage (Note 12)
RLDO2_PD ILDO_FB2
Output Pull-Down Resistance in Shutdown LDO_FB2 Input Current
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LTC3577-3/LTC3577-4 ELECTRICAL CHARACTERISTICS
SYMBOL VOUT VOUT UVLO VON_TH ION PARAMETER Pushbutton Operating Supply Range VOUT Falling VOUT Rising ON Threshold Rising ON Threshold Falling ON Input Current VON = VOUT VON = 0V Pushbutton Pin (ON) (Note 9) Pushbutton is Disabled Below VOUT UVLO
l
Pushbutton Controller. The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VOUT = 3.8V, unless otherwise noted.
CONDITIONS MIN 2.7 2.5 2.7 2.8 0.8 0.7 -9 TYP MAX 5.5 2.9 1.2 1 -14 UNITS V V V V V A A
0.4 -1 -4
Power-On Input Pin (PWR_ON) VPWR_ON IPWR_ON IPBSTAT VPBSTAT IEXTPWR VEXTPWR IPGOOD VPGOOD VTHPGOOD tON_PBSTAT1 tON_PBSTAT2 tPBSTAT_PW tON_PUP tON_RST tON_RST_PW tPUP_PDN tPDN_PUP tPWR_ONH tPWR_ONL tPWR_ONBK1 tPWR_ONBK2 tPGOODH tPGOODL tLDO2_BK1 PWR_ON Threshold Rising PWR_ON Threshold Falling PWR_ON Input Current PBSTAT Output High Leakage Current PBSTAT Output Low Voltage EXTPWR Pin Input Current EXTPWR Pin Output Low Voltage PGOOD Output High Leakage Current PGOOD Output Low Voltage PGOOD Threshold Voltage ON Low Time to PBSTAT Low ON High to PBSTAT High PBSTAT Minimum Pulse Width ON Low Time for Power Up ON Low to PGOOD Reset Low PGOOD Reset Low Pulse Width Minimum Time from Power Up to Down Minimum Time from Power Down to Up PWR_ON High to Power Up PWR_ON Low to Power Down PWR_ON Power-Up Blanking PWR_ON Power-Down Blanking From Regulation to PGOOD High Bucks Disabled to PGOOD Low LDO2 Enable to Buck Enable PWR_ON Low Recognized from Power Up PWR_ON High Recognized from Power Down Buck1, 2 and LDO1 Within PGOOD Threshold Bucks Disabled 12.5 12 PBSTAT Low > tPBSTAT_PW 40 VPWR_ON = 3V VPBSTAT = 3V IPBSTAT = 3mA VEXTPWR = 3V IEXTPWR = 2mA VPGOOD = 3V IPGOOD = 3mA (Note 13) -1 0.1 -8 50 900 50 50 14 1.8 1 1 50 50 1 1 230 44 14.5 17.5 16.5 0.4 -1 -1 0.1 0 0.15 0.8 0.7 1.2 1 1 0.4 1 0.4 1 0.4 V V A A V A V A V % ms s ms ms Seconds ms Seconds Seconds ms ms Seconds Seconds ms s ms
Status Output Pins (PBSTAT, EXTPWR, PGOOD)
Pushbutton Timing Parameters
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3577-3/LTC3577-4 are guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: This IC includes over temperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 110C when over temperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Note 4: VCC is the greater of VBUS, VOUT or BAT.
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LTC3577-3/LTC3577-4 ELECTRICAL CHARACTERISTICS
Note 5: Total input current is the sum of quiescent current, IBUSQ, and measured current given by VCLPROG/RCLPROG * (hCLPROG + 1). Note 6: hC/10 is expressed as a fraction of measured full charge current with indicated PROG resistor. Note 7: The current limit features of this part are intended to protect the IC from short term or intermittent fault conditions. Continuous operation above the maximum specified pin current rating may result in device degradation or failure. Note 8: The serial port is tested at rated operating frequency. Timing parameters are tested and/or guaranteed by design. Note 9: VOUT not in UVLO. Note 10: Buck FB high, not switching. Note 11: Measured with the LDO running unity gain with output tied to feedback pin. Note 12: Dropout voltage is the minimum input to output voltage differential needed for an LDO to maintain regulation at a specified output current. When an LDO is in dropout, its output voltage will be equal to VIN - VDROP . Note 13: PGOOD threshold is expressed as a percentage difference from the Buck1, Buck2 and LDO1 regulation voltages. The threshold is measured from Buck1, Buck2 and LDO1 output rising. Note 14: IVOUT_LED is the sum of VOUT and VIN3 current due to LED driver. Note 15: The IBATQ specifications represent the total battery load assuming VINLDO1, VINLDO2, VIN12 and VIN3 are tied directly to VOUT .
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C unless otherwise specified
Input Supply Current vs Temperature
0.8 0.7 0.6 IVBUS (mA) IVBUS (mA) 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 75 50 25 TEMPERATURE (C) 100 125 0 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 VBUS = 5V 1x MODE 0.10
Input Supply Current vs Temperature (Suspend Mode)
VBUS = 5V 450 400 0.08 350 300 IBAT (A) 0.06 250 200 150 0.02 100 50
Battery Drain Current vs Temperature
ALL SUPPLIES ENABLED (EXCEPT BOOST) PULSE-SKIP MODE NO LOAD ON ALL SUPPLIES VBAT = 3.8V VBUS = 0V ALL SUPPLIES ENABLED (EXCEPT BOOST) Burst Mode OPERATION
0.04
ALL SUPPLIES DISABLED EXCEPT LDO1 -25 50 25 0 75 TEMPERATURE (C) 100 125
0 -50
357734 G01
357734 G02
357734 G03
Input Current Limit vs Temperature
1200 1100 1000 900 800 IVBUS (mA) RON (m) 700 600 500 400 300 200 100 0 -50 -25 1x MODE 50 25 0 75 TEMPERATURE (C) 100 125 5x MODE VBUS = 5V RCLPROG = 2.1k 300 10x MODE 280 260 240 220 180 160 140 120 100
Input RON vs Temperature
IOUT = 400mA 600 500 VBUS = 4.5V IBAT (mA) VBUS = 5V VBUS = 5.5V 400 300 200 100
Charge Current vs Temperature (Thermal Regulation)
VBUS = 5V 10x MODE RPROG = 2k 50 25 75 0 TEMPERATURE (C) 100 125
0 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
0 -50 -25
357734 G04
357734 G05
357734 G06
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LTC3577-3/LTC3577-4 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C unless otherwise specified
Battery Current and Voltage vs Time
600 500 400 IBAT (mA) 300 200 CHRG VBAT 4 3 SAFETY TIMER 2 TERMINATION C/10 IBAT 3 4 TIME (HOUR) 5 6 0 1 6 5 VBAT AND VCHRG (V) 4.24 4.22 4.20 VFLOAT (V) 4.18 4.16 4.14 4.12 4.10 0 200 400 600 800 1000
357734 G08
Battery Float Voltage Load Regulation (LTC3577-3)
VBUS = 5V 10x MODE 4.24 4.22 4.20 4.18 VBAT (V) 4.16 4.14 4.12 4.10 4.08 4.06
Battery Regulation (Float) Voltage vs Temperature
IBAT = 2mA LTC3577-3
LTC3577-4
1450mAhr CELL 100 VBUS = 5V RPROG = 2k RCLPROG = 2k 0 0 2 1
4.04 -50 -25
0
IBAT (mA)
357734 G07
75 50 25 TEMPERATURE (C)
100
125
357734 G09
IBAT vs VBAT (LTC3577-3)
600 500 400 IBAT (mA) 300 200 100 0 VBUS = 5V 10x MODE RPROG = 2k RCLPROG = 2k 2.0 2.4 2.8 3.2 3.6 VBAT (V) 4.0 4.4 600
IBAT vs VBAT (LTC3577-4)
RCLPROG = 2.1k RPROG = 2k 500 VBUS = 5V 10x MODE 0.25
Forward Voltage vs Ideal Diode Current (No External FET)
VBUS = 0V TA = 25C VBAT = 3.2V VBAT = 3.6V VFWD (V)
0.20 RISING VBAT VBAT = 4.2V 0.15
IBAT (mA)
RISING VBAT FALLING VBAT
400 300 200 100 0
FALLING VBAT
0.10
0.05
2.0
2.4
2.8
3.2 3.6 VBAT (V)
4.0
4.4
0
0
0.2
0.4
0.6 IBAT (A)
0.8
1.0
1.2
357734 G10
357734 G54
357734 G11
Forward Voltage vs Ideal Diode Current (with Si2333DS External FET)
40 35 30 VFWD (mV) 25 20 15 10 5 0 0 0.2 0.4 0.6 IBAT (A) 0.8 1.0
357734 G12
Input Connect Waveform
VBUS 5V/DIV VOUT 5V/DIV IBUS 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.75V IOUT = 100mA RCLPROG = 2k RPROG = 2k 1ms/DIV
357734 G25
Input Disconnect Waveform
VBUS 5V/DIV VOUT 5V/DIV IBUS 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.75V IOUT = 100mA RCLPROG = 2k RPROG = 2k 1ms/DIV
357734 G26
VBAT = 3.8V VBUS = 0V TA = 25C
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LTC3577-3/LTC3577-4 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C unless otherwise specified
Switching from 1x to 5x Mode
ILIM0 5V/DIV VOUT 5V/DIV IBUS 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.75V IOUT = 50mA RCLPROG = 2k RPROG = 2k 1ms/DIV
357734 G27
Switching from Suspend Mode to 5x Mode
WALL 5V/DIV VOUT 5V/DIV IWALL 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.75V IOUT = 100mA RCLPROG = 2k RPROG = 2k ILIM1 = 5V 100s/DIV
357734 G28
WALL Connect Waveform
ILIM0/ILIM1 5V/DIV IBUS 0.5A/DIV IBAT 0.5A/DIV
VBAT = 3.75V IOUT = 100mA RPROG = 2k
1ms/DIV
357734 G29
WALL Disconnect Waveform
2.8 WALL 5V/DIV FREQUENCY (MHz) VOUT 5V/DIV IWALL 0.5A/DIV IBAT 0.5A/DIV VBAT = 3.75V IOUT = 100mA RPROG = 2k 1ms/DIV
357734 G30
Oscillator Frequency vs Temperature
100 2.7 2.6 EFFICIENCY (%) 2.5 2.4 2.3 2.2 2.1 2.0 1.9 1.8 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125 VOUT = 5V VOUT = 3.8V
Step-Down Switching Regulator 1 3.3V Output Efficiency vs IOUT1
Burst Mode 90 OPERATION 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 IOUT (mA) VOUT1 = 3.3V VIN12 = 3.8V VIN12 = 5V 100 1000
357734 G14
PULSE SKIP
357734 G13
Step-Down Switching Regulator 2 1.8V Output Efficiency vs IOUT2
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.01 0.1 1 10 IOUT (mA) VOUT2 = 1.8V VIN12 = 3.8V VIN12 = 5V 100 1000
357734 G15
Step-Down Switching Regulator 3 1.2V Ooutput Efficiency vs IOUT3
100 100 Burst Mode OPERATION EFFICIENCY (%) 90 80 70 60 50 40 30 VOUT3 = 1.2V VIN3 = 3.8V VIN3 = 5V 0.1 1 10 IOUT (mA) 100 1000
357734 G16
Step-Down Switching Regulator 3 2.5V Output Efficiency
Burst Mode OPERATION
Burst Mode OPERATION
90 80 EFFICIENCY (%) PULSE SKIP 70 60 50 40 30 20 10 0 0.01
PULSE SKIP
PULSE SKIP
20 10 0 0.01 0.1 1 10 IOUT (mA)
VOUT3 = 2.5V VIN3 = 3.8V VIN3 = 5V 100 1000
357734 G17
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LTC3577-3/LTC3577-4 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C unless otherwise specified
Step-Down Switching Regulator Short-Circuit Current vs Temperature
1500 1400 SHORT-CIRCUIT CURRENT (mA) 1300 1200 1100 1000 900 800 700 600 500 -50 -25 0 VINx = 3.8V VINx = 5V 75 50 25 TEMPERATURE (C) 100 125 500mA BUCK IOUT3 500mA 5mA VOUT1 = 3.3V 50s/DIV IOUT1 = 10mA VOUT2 = 1.8V IOUT2 = 20mA VOUT3 = 1.2V VOUT = VBAT = 3.8V
357734 G19
Step-Down Switching Regulator Output Transient (Burst Mode Operation)
VOUT1 50mV/DIV (AC) VOUT2 50mV/DIV (AC) VOUT3 100mV/DIV (AC) VOUT1 50mV/DIV (AC) VOUT2 50mV/DIV (AC) VOUT3 100mV/DIV (AC) 500mA 5mA
Step-Down Switching Regulator Output Transient (Pulse Skip)
800mA BUCK
IOUT3
357734 G18
VOUT1 = 3.3V 50s/DIV IOUT1 = 30mA VOUT2 = 1.8V IOUT2 = 20mA VOUT3 = 1.2V VOUT = VBAT = 3.8V
357734 G20
Step-Down Switching Regulator Switch Impedance vs Temperature
0.9 0.8 SWITCH IMPEDANCE () 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 800mA PMOS 800mA NMOS 500mA NMOS 500mA PMOS FEEDBACK (V) VINX = 3.2V 0.85 0.84 0.83 0.82 0.81 0.80 0.79 0.78 0.77 0.76
800mA Step-Down Switching Regulator Feedback Voltage vs Output Current
0.85 0.84 0.83 FEEDBACK (V) Burst Mode OPERATION PULSE SKIP 0.82 0.81 0.80 0.79 0.78 0.77 VIN3 = 3.8V VIN3 = 5V 1 10 IOUT (mA) 100 1000
357732 G22
500mA Step-Down Switching Regulator Feedback Voltage vs Output Current
Burst Mode OPERATION PULSE SKIP
0.76 0.75 0.1 1 10 IOUT (mA)
0.75 0.1
VIN12 = 3.8V VIN12 = 5V 100 1000
357734 G23
357734 G21
Step-Down Switching Regulator 3 Soft-Start and Shutdown
VOUT1 100mV/DIV (AC) 2V VOUT3 1V 0V 400mA IL3 200mA 0mA VOUT1 = 1.8V IOUT1 = 100mA ROUT3 = 3 50s/DIV
357734 G24
OVP Connection Waveform
VBUS 5V/DIV OVGATE 5V/DIV OVGATE 5V/DIV OVP INPUT VOLTAGE 0V TO 5V STEP 5V/DIV OVP INPUT VOLTAGE 5V TO 10V STEP 5V/DIV 500s/DIV
357734 G31
OVP Protection Waveform
VBUS 5V/DIV
500s/DIV
357734 G32
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LTC3577-3/LTC3577-4 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C unless otherwise specified
OVP Reconnection Waveform
37 VBUS 5V/DIV
OVSENS Quiescent Current vs Temperature
VOVSENS = 5V 6.280
Rising Overvoltage Threshold vs Temperature
QUIESCENT CURRENT (A)
35 OPV THRESHOLD (V)
6.275
33
6.270
OVGATE 5V/DIV OVP INPUT VOLTAGE 10V TO 5V STEP 5V/DIV
31
6.265
500s/DIV
357734 G33
29
6.260
27 -40
-15
35 10 TEMPERATURE (C)
60
85
357734 G34
6.255 -40
-15
35 10 TEMPERATURE (C)
60
85
357734 G35
OVGATE vs OVSENS
12 OVSENS CONNECTED TO INPUT THROUGH 10 6.2k RESISTOR EFFICIENCY (%) 8 OVGATE (V) 6 4 2 0 0 2 4 6 INPUT VOLTAGE (V) 8
357734 G36
LED Driver Efficiency 10 LEDs
90 85 80 75 70 65 60 55 50 0 2 4 6 3V 3.6V 4.2V 4.8V 5.5V 8 10 12 14 16 18 20 ILED (mA)
357734 G38
LED Driver Efficiency 8 LEDs
90 85 80 EFFICIENCY (%) 75 70 65 60 55 50 0 2 4 6 3V 3.6V 4.2V 4.8V 5.5V 8 10 12 14 16 18 20 ILED (mA)
357734 G39
LED Driver Efficiency 6 LEDs
90 85 80 EFFICIENCY (%) EFFICIENCY (%) 75 70 65 60 55 50 0 2 4 6 3V 3.6V 4.2V 4.8V 5.5V 8 10 12 14 16 18 20 ILED (mA)
357734 G40
LED Driver Efficiency 4 LEDs
90 85 80 75 70 65 60 55 50 0 2 4 6 3V 3.6V 4.2V 4.8V 5.5V 8 10 12 14 16 18 20 ILED (mA)
357734 G50
DAC Code vs LED Current
70 60 50 CURRENT (dB) 40 30 20 10 0 0 10 20 40 30 DAC CODE 50 60 70 0dB = 20A 60dB = 20mA RLED_FS = 20k
357734 G41
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LTC3577-3/LTC3577-4 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C unless otherwise specified
LED Boost Start-Up Transient
400 350 MAX DUTY CYCLE (%) ILED 10mA/DIV RDS(ON) (m) 300 250 200 150 100 50 2ms/DIV
357734 G42
LED Boost Switch Impedance vs Temperature
96.6 96.5 96.4 96.3 96.2 96.1 96.0 95.9 95.8
LED Boost Maximum Duty Cycle vs Temperature
VBOOST 20V/DIV IL 200mA/DIV
0 -40 -20
3V 3.6V 4.2V 4.8V 5.5V 0 20 40 60 80 100 120 140 TEMPERATURE (C)
357734 G44
95.7 -50
3V 3.6V 4.2V 5.5V -25 0 25 50 75 TEMPERATURE (C) 100 125
LED Boost Current Limit vs Temperature
1200 1100 1000 CURRENT LIMIT (mA) 900 EFFICIENCY (%) 800 700 600 500 400 300 200 100 0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C)
357734 G46
357734 G45
10-LED Driver Efficiency
90 80 70 60 MAX PWM 50 40 30 20 10 0 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 LED CURRENT (A) 1.E-01 IOUT1 CONSTANT CURRENT LDO2 20mV/DIV (AC) 100mA 5mA LDO1 50mV/DIV (AC)
LDO Load Step
LDO1 = 1.2V 20s/DIV LDO2 = 2.5V ILDO2 = 40mA VOUT = VBAT = 3.8V
357734 G48
357734 TA01b
Too Hot BAT Discharge
BATTERY DISCHARGE CURRENT (mA) VNTC < VTOO_HOT 180 VBUS = 0V 160 140 IBAT (mA) 120 100 80 60 40 20 0 3.8 3.9 4.0 VBAT (V) 4.1 4.2
357734 G49
Battery Discharge vs Temperature
200 175 150 125 100 75 50 25 0 50 VBAT = 4.1V VNTC < VTOO_HOT 5x MODE IVOUT = 0mA 60 70 90 100 80 TEMPERATURE (C) 110 120 VBUS = 0V CURRENT (mA) VBUS = 5V 600 500 400
Input and Battery Current vs Output Current
RPROG = 2k RCLPROG = 2k IIN
200
ILOAD 300 200 100 0 -100 0 WALL = 0V 100 200 IBAT (DISCHARGING) 400 300 IOUT (mA) 500 600 IBAT (CHARGING)
357734 G51
357734 G37
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LTC3577-3/LTC3577-4 PIN FUNCTIONS
ILIM0, ILIM1 (Pins 1, 2): Input Current Control Pins. ILIM0 and ILIM1 control the input current limit. See Table 1 in "USB PowerPath Controller" section. Both pins are pulled low by a weak current sink. LED_FS (Pin 3): A resistor between this pin and ground sets the full-scale output current of the ILED pin. WALL (Pin 4): Wall Adapter Present Input. Pulling this pin above 4.3V will disconnect the power path from VBUS to VOUT. The ACPR pin will also be pulled low to indicate that a wall adapter has been detected. SW3 (Pin 5): Power Transmission (Switch) Pin for StepDown Switching Regulator 3 (Buck3). VIN3 (Pin 6): Power Input for Step-Down Switching Regulator 3. This pin should be connected to VOUT. FB3 (Pin 7): Feedback Input for Step-Down Switching Regulator 3 (Buck3). This pin servos to a fixed voltage of 0.8V when the control loop is complete. OVSENSE (Pin 8): Overvoltage Protection Sense Input. OVSENSE should be connected through a 6.2k resistor to the input power connector and the drain of an external N-channel MOS pass transistor. When the voltage on this pin exceeds a preset level, the OVGATE pin will be pulled to GND to disable the pass transistor and protect downstream circuitry. LED_OV (Pin 9): A resistor between this pin and the boosted LED backlight voltage sets the overvoltage limit on the boost output. If the boost voltage exceeds the programmed limit the LED boost converter will be disabled. DVCC (Pin 10): Supply Voltage for I2C Lines. This pin sets the logic reference level of the LTC3577-3/LTC3577-4. A UVLO circuit on the DVCC pin forces all registers to all 0s whenever DVCC is <1V. Bypass to GND with a 0.1F capacitor. SDA (Pin 11): I2C Data Input. Serial data is shifted one bit per clock to control the LTC3577-3/LTC3577-4. The logic level for SDA is referenced to DVCC. SCL (Pin 12): I2C Clock Input. The logic level for SCL is referenced to DVCC. OVGATE (Pin 13): Overvoltage Protection Gate 0utput. Connect OVGATE to the gate pin of an external N-channel MOS pass transistor. The source of the transistor should be connected to VBUS and the drain should be connected to the product's DC input connector. In the absence of an overvoltage condition, this pin is connected to an internal charge pump capable of creating sufficient overdrive to fully enhance this transistor. If an overvoltage condition is detected, OVGATE is brought rapidly to GND to prevent damage. OVGATE works in conjunction with OVSENSE to provide this protection. PWR_ON (Pin 14): Logic Input Used to Keep Buck1, Buck2 and LDO2 Enabled After Power Up. May also be used to enable regulators directly (sequence = LDO2 Buck1 Buck2). See "Pushbutton Interface Operation" section for more information. ON (Pin 15): Pushbutton Input. A weak internal pull-up forces ON high when left floating. A normally open pushbutton is connected from ON to ground to force a low state on this pin. PBSTAT (Pin 16): Open-drain output is a debounced and buffered version of ON to be used for processor interrupts. EN3 (Pin 17): Enable Pin for Step-Down Switching Regulator 3 (Buck3). SW (Pins 18, 19, 20): Power Transmission (Switch) Pin for LED Boost Converter. See "LED Backlight/Boost Operation" section for circuit hook-up and component selection. I2C is used to control LED driver enable. I2C default is LED driver off. PGOOD (Pin 21): Open-Drain Output. PGOOD indicates that Buck1, Buck2 and LDO1 are within 8% of final regulation value. There is a 230ms delay from all regulators reaching regulation and PGOOD going high.
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LTC3577-3/LTC3577-4 PIN FUNCTIONS
ILED (Pin 22): Series LED Backlight Current Sink Output. This pin is connected to the cathode end of the series LED backlight string. The current drawn through the series LEDs is programmed via a 6-bit 60dB DAC and can be further dimmed via an internal PWM function. I2C is used to control LED driver enable, brightness, gradation (soft on/soft off). I2C default is LED driver off, current = 0mA. LDO1_FB (Pin 23): Feedback Voltage Input for Low Dropout Linear Regulator 1 (LDO1). LDO1 output voltage is set using an external resistor divider between LDO1 and LDO1_FB. LDO2_FB (Pin 24): Feedback Voltage Input for Low Dropout Linear Regulator 2 (LDO2). LDO2 output voltage is set using an external resistor divider between LDO2 and LDO2_FB. FB2 (Pin 25): Feedback Input for Step-Down Switching Regulator 2 (Buck2). This pin servos to a fixed voltage of 0.8V when the control loop is complete. FB1 (Pin 26): Feedback Input for Step-Down Switching Regulator 1 (Buck1). This pin servos to a fixed voltage of 0.8V when the control loop is complete. VINLDO1 (Pin 27): Input Supply of Low Dropout Linear Regulator 1 (LDO1). This pin should be bypassed to ground with a 1F or greater ceramic capacitor. LDO1 (Pin 28): Output of Low Dropout Linear Regulator 1. LDO1 is an always-on LDO and will be enabled whenever the part is not in VOUT UVLO. This pin must be bypassed to ground with a 1F or greater ceramic capacitor. LDO2 (Pin 29): Output of Low Dropout Linear Regulator 2. This pin must be bypassed to ground with a 1F or greater ceramic capacitor. VINLDO2 (Pin 30): Input Supply of Low Dropout Linear Regulator 2 (LDO2). This pin should be bypassed to ground with a 1F or greater ceramic capacitor. SW2 (Pin 31): Power Transmission (Switch) Pin for StepDown Switching Regulator 2 (Buck2). VIN12 (Pin 32): Power Input for Step-Down Switching Regulators 1 and 2. This pin will generally be connected to VOUT. SW1 (Pin 33): Power Transmission (Switch) Pin for StepDown Switching Regulator 1 (Buck1). NTCBIAS (Pin 34): Output Bias Voltage for NTC. A resistor from this pin to the NTC pin will bias the NTC thermistor. NTC (Pin 35): The NTC pin connects to a battery's thermistor to determine if the battery is too hot or too cold to charge. If the battery's temperature is out of range, charging is paused until it drops back into range. A low drift bias resistor is required from NTCBIAS to NTC and a thermistor is required from NTC to ground. PROG (Pin 36): Charge Current Program and Charge Current Monitor Pin. Connecting a resistor from PROG to ground programs the charge current: ICHG = 1000 V A RPROG
()
If sufficient input power is available in constant-current mode, this pin servos to 1V. The voltage on this pin always represents the actual charge current. IDGATE (Pin 37): Ideal Diode Gate Connection. This pin controls the gate of an optional external P-channel MOSFET transistor used to supplement the internal ideal diode. The source of the P-channel MOSFET should be connected to VOUT and the drain should be connected to BAT. It is important to maintain high impedance on this pin and minimize all leakage paths. BAT (Pin 38): Single Cell Li-Ion Battery Pin. Depending on available power and load, a Li-Ion battery on BAT will either deliver system power to VOUT through the ideal diode or be charged from the battery charger.
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LTC3577-3/LTC3577-4 PIN FUNCTIONS
VOUT (Pin 39): Output Voltage of the PowerPath Controller and Input Voltage of the Battery Charger. The majority of the portable product should be powered from VOUT. The LTC3577-3/LTC3577-4 will partition the available power between the external load on VOUT and the internal battery charger. Priority is given to the external load and any extra power is used to charge the battery. An ideal diode from BAT to VOUT ensures that VOUT is powered even if the load exceeds the allotted input current from VBUS or if the VBUS power source is removed. VOUT should be bypassed with a low impedance multilayer ceramic capacitor. VBUS (Pin 40): USB Input Voltage. VBUS will usually be connected to the USB port of a computer or a DC output wall adapter. VBUS should be bypassed with a low impedance multilayer ceramic capacitor. ACPR (Pin 41): Wall Adapter Present Output (Active Low). A low on this pin indicates that the wall adapter input comparator has had its input pulled above its input threshold (typically 4.3V). This pin can be used to drive the gate of an external P-channel MOSFET to provide power to VOUT from a power source other than a USB port. EXTPWR (Pin 42): External Power Present Output (Active Low, Open-Drain Output). A low on this pin indicates that external power is present at either the VBUS or WALL input. For EXTPWR to signal VBUS present, VBUS must exceed the VBUS undervoltage lockout threshold. For EXTPWR to signal WALL present, WALL must exceed the absolute and differential WALL input thresholds. The EXTPWR signal is independent of the ILIM1 and ILIM0 pins. Thus, it is possible to have the input current limit circuitry in suspend with EXTPWR showing a valid charging level on VBUS. CLPROG (Pin 43): Input Current Program and Input Current Monitor Pin. A resistor from CLPROG to ground determines the upper limit of the current drawn from the VBUS pin (i.e., the input current limit). A precise fraction of the input current, hCLPROG, is sent to the CLPROG pin. The input PowerPath delivers current until the CLPROG pin reaches 2V (10x mode), 1V (5x mode) or 0.2V (1x mode). Therefore, the current drawn from VBUS will be limited to an amount given by hCLPROG and RCLPROG. In USB applications the resistor RCLPROG should be set to no less than 2.1k. CHRG (Pin 44): Open-Drain Charge Status Output. The CHRG pin indicates the status of the battery charger. If CHRG is high then the charger is near the float voltage (charge current less than 1/10th programmed charge current) or charging is complete and charger is disabled. A low on CHRG indicates that the charger is enabled. For more information see the "Charge Status Indication" section. Exposed Pad (Pin 45): Ground. The exposed package pad is ground and must be soldered to the PC board for proper functionality and for maximum heat transfer.
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LTC3577-3/LTC3577-4 BLOCK DIAGRAM
8 OVSENS OVERVOLTAGE PROTECTON 40 VBUS 13 OVGATE 42 EXTPWR EXTERNAL POWER DETECT 4 WALL WALL DETECT VOUT 39 41 ACPR
43 34 35 1 2 44
CLPROG NTCBIAS NTC ILIM0 ILIM1 CHRG CHARGE STATUS ILIM LOGIC 14ms RISING DELAY
BATTERY TEMP MONITOR
OVERTEMP BATTERY SAFETY DISCHARGER UVLO EN 0.8V 150mA LDO2
14 15 16 17 10 11 12 21
PWR_ON ON PBSTAT EN3 DVCC SDA SCL PGOOD 230ms FALLING DELAY LED_OV SW 18,19,20 I2C LOGIC PUSHBUTTON INPUT
EN 500mA, 2.25MHz BUCK REGULATOR 1 0.8V
+ -
FB1
PG
EN 500mA, 2.25MHz BUCK REGULATOR 2 SW2 0.8V
+ -
FB2 VIN3 SW3
PG
EN 800mA, 2.25MHz BUCK REGULATOR 3 40V LED BACKLIGHT BOOST CONVERTER 0.8V
9
+ -
FB3 VINLD01 0.8V
DAC ILED LED_FS 0.8V
22 3
150mA LDO1 GND 45
+ -
ENB PG
+ - + -
INPUT CURRENT LIMIT
CC/CV CHARGER
IDEAL DIODE
+ -
15mV
IDGATE
37
BAT PROG
38 36
VINLD02
30
LDO2 LDO2_FB
29 24
VIN12 SW1
32 33
26
31
25 6 5
7 27
LDO1 LDO1_FB
28 23
357734 BD
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LTC3577-3/LTC3577-4 OPERATION
PowerPath OPERATION Introduction The LTC3577-3/LTC3577-4 are highly integrated power management IC that includes the following features: - PowerPath controller - Battery charger - Ideal diode - Input overvoltage protection - Pushbutton controller - Three step-down switching regulators - Two low dropout linear regulators - 40V LED backlight controller Designed specifically for USB applications, the PowerPath controller incorporates a precision input current limit which communicates with the battery charger to ensure that input current does not violate the USB average input
FROM AC ADAPTER
current specification. The ideal diode from BAT to VOUT guarantees that ample power is always available to VOUT even if there is insufficient or absent power at VBUS. The LTC3577-3/LTC3577-4 also have the ability to receive power from a wall adapter or other non-current-limited power source. Such a power supply can be connected to the VOUT pin of the LTC3577-3/LTC3577-4 through an external device such as a power Schottky or FET as shown in Figure 1. The LTC3577-3/LTC3577-4 have the unique ability to use the output, which is powered by an external supply, to charge the battery while providing power to the load. A comparator on the WALL pin is configured to detect the presence of the wall adapter and shut off the connection to the USB. This prevents reverse conduction from VOUT to VBUS when a wall adapter is present. The LTC3577-3/LTC3577-4 also include a pushbutton input to control the power sequencing of two synchronous step-down switching regulators (Buck1 and Buck2), a low dropout regulator (LDO2) and system reset. The three
4
WALL
FROM USB
+ -
40 VBUS
75mV (RISING) 25mV (FALLING)
BAT
Figure 1. Simplified PowerPath Block Diagram
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+ -
+ - + -
ENABLE VOUT USB CURRENT LIMIT IDEAL DIODE CONSTANT-CURRENT CONSTANT-VOLTAGE BATTERY CHARGER
4.3V (RISING) 3.2V (FALLING)
ACPR
41
VOUT
39 SYSTEM LOAD
+ -
15mV
IDGATE
37
OPTIONAL EXTERNAL IDEAL DIODE PMOS
BAT
38
+
357734 F01
Li-Ion
LTC3577-3/LTC3577-4 OPERATION
2.25MHz constant frequency current mode step-down switching regulators provide 500mA, 500mA and 800mA each and support 100% duty cycle operation as well as operating in Burst Mode operation for high efficiency at light load. No external compensation components are required for the switching regulators. The two low dropout regulators can output up to 150mA. The onboard LED backlight boost circuitry can drive up to 10 series LEDs and includes versatile digital dimming via the I2C input. The I2C input also provides additional regulator controls as well as status read-back. All regulators can be programmed for a minimum output voltage of 0.8V and can be used to power a microcontroller core, microcontroller I/O, memory or other logic circuitry. USB PowerPath Controller The input current limit and charge control circuits of the LTC3577-3/LTC3577-4 are designed to limit input current as well as control battery charge current as a function of IVOUT . VOUT drives the combination of the external load, the three step-down switching regulators, two LDOs, LED backlight and the battery charger. If the combined load does not exceed the programmed input current limit, VOUT will be connected to VBUS through an internal 200m P-channel MOSFET. If the combined load at VOUT exceeds the programmed input current limit, the battery charger will reduce its charge current by the amount necessary to enable the external load to be satisfied while maintaining the programmed input current. Even if the battery charge current is set to exceed the allowable USB current, the average input current USB specification will not be violated. Furthermore, load current at VOUT will always be prioritized and only excess available current will be used to charge the battery. The current out of the CLPROG pin is a fraction (1/hCLPROG) of the VBUS current. When a programming resistor is connected from IVBUS = IBUSQ + IVBUS = IBUSQ + CLPROG to GND, the voltage on CLPROG represents the input current: IVBUS = IBUSQ + VCLPROG *h RCLPROG CLPROG
where IBUSQ and hCLPROG are given in the Electrical Characteristics table. The input current limit is programmed by the ILIM0 and ILIM1 pins. The LTC3577-3/LTC3577-4 can be configured to limit input current to one of several possible settings as well as be deactivated (USB suspend). The input current limit will be set by the appropriate servo voltage and the resistor on CLPROG according to the following expression: IVBUS = IBUSQ + 0.2V RCLPROG 1V RCLPROG 2V RCLPROG * hCLPROG 1x Mode
( ( (
) ) )
* hCLPROG 5x Mode
* hCLPROG 10 x Mode
Under worst-case conditions, the USB specification for average input current will not be violated with an RCLPROG resistor of 2.1k or greater. Table 1 shows the available settings for the ILIM0 and ILIM1 pins:
Table 1. Controlled Input Current Limit
ILIM1 1 1 0 0 ILIM0 1 0 1 0 IBUS(LIM) 100mA (1x) 1A (10x) Suspend 500mA (5x)
Notice that when ILIM0 is low and ILIM1 is high, the input current limit is set to a higher current limit for increased charging and current availability at VOUT . This mode is typically used when there is a higher power, non-USB source available at the VBUS pin.
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LTC3577-3/LTC3577-4 OPERATION
Ideal Diode from BAT to VOUT The LTC3577-3/LTC3577-4 have an internal ideal diode as well as a controller for an optional external ideal diode. Both the internal and the external ideal diodes respond quickly whenever VOUT drops below BAT. If the load increases beyond the input current limit, additional current will be pulled from the battery via the ideal diodes. Furthermore, if power to VBUS (USB) or VOUT (external wall power or high voltage regulator) is removed, then all of the application power will be provided by the battery via the ideal diodes. The ideal diodes are fast enough to keep VOUT from dropping significantly below VBAT with just the recommended output capacitor (see Figure 2). The ideal diode consists of a precision amplifier that enables an on-chip P-channel MOSFET whenever the voltage at VOUT is approximately 15mV (VFWD) below the voltage at BAT. The resistance of the internal ideal diode is approximately 200m. If this is sufficient for the application, then no external components are necessary. However, if lower resistance is needed, an external P-channel MOSFET can be added from BAT to VOUT . The IDGATE pin of the LTC3577-3/LTC3577-4 drives the gate of the external P-channel MOSFET for automatic ideal diode control. The source of the MOSFET should be connected to VOUT and the drain should be connected to BAT. Capable of driving a 1nF load, the IDGATE pin can control an external P-channel MOSFET having extremely low on-resistance.
4.0V VOUT 3.8V 3.6V 500mA CHARGE IBAT 0 DISCHARGE 1A 0A VBAT = 3.8V VBUS = 5V 5x MODE COUT = 10F 10s/DIV
357734 F02
Using the WALL Pin to Detect the Presence of an External Power Source The WALL input pin can be used to identify the presence of an external power source (particularly one that is not subject to a fixed current limit like the USB VBUS input). Typically, such a power supply would be a 5V wall adapter output or the low voltage output of a high voltage buck regulator. When the wall adapter output (or buck regulator output) is connected directly to the WALL pin, and the voltage exceeds the WALL pin threshold, the USB power path (from VBUS to VOUT) will be disconnected. Furthermore, the ACPR pin will be pulled low. In order for the presence of an external power supply to be acknowledged, both of the following conditions must be satisfied: 1. The WALL pin voltage must exceed approximately 4.3V. 2. The WALL pin voltage must be greater than 75mV above the BAT pin voltage. The input power path (between VBUS and VOUT) is reenabled and the ACPR pin is pulled high when either of the following conditions is met: 1. The WALL pin voltage falls to within 25mV of the BAT pin voltage. 2. The WALL pin voltage falls below 3.2V. Each of these thresholds is suitably filtered in time to prevent transient glitches on the WALL pin from falsely triggering an event. Suspend Mode When ILIM0 is pulled high and ILIM1 is pulled low the LTC3577-3/LTC3577-4 enters suspend mode to comply with the USB specification. In this mode, the power path between VBUS and VOUT is put in a high impedance state to reduce the VBUS input current to 50A. If no other power source is available to drive WALL and VOUT , the system load connected to VOUT is supplied through the ideal diodes connected to BAT.
-500mA IVOUT LOAD
Figure 2. Ideal Diode Transient Response
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LTC3577-3/LTC3577-4 OPERATION
VBUS Undervoltage Lockout (UVLO) and Undervoltage Current Limit (UVCL) An internal undervoltage lockout circuit monitors VBUS and keeps the input current limit circuitry off until VBUS rises above the rising UVLO threshold (3.8V) and at least 50mV above VOUT . Hysteresis on the UVLO turns off the input current limit if VBUS drops below 3.7V or 50mV below VOUT . When this happens, system power at VOUT will be drawn from the battery via the ideal diode. To minimize the possibility of oscillation in and out of UVLO when using resistive input supplies, the input current limit is reduced as VBUS falls below 4.45V (typ). Battery Charger The LTC3577-3/LTC3577-4 include a constant-current/ constant-voltage battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out of temperature charge pausing. When a battery charge cycle begins, the battery charger first determines if the battery is deeply discharged. If the battery voltage is below VTRKL, typically 2.85V, an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. If the low voltage persists for more than 1/2 hour, the battery charger automatically terminates. Once the battery voltage is above 2.85V, the battery charger begins charging in full power constant-current mode. The current delivered to the battery will try to reach 1000V/RPROG. Depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. The external load will always be prioritized over the battery charge current. The USB current limit programming will always be observed and only additional current will be available to charge the battery. When system loads are light, battery charge current will be maximized. Charge Termination The battery charger has a built-in safety timer. When the battery voltage approaches the float voltage, the charge current begins to decrease as the LTC3577-3/LTC3577-4 enters constant-voltage mode. Once the battery charger detects that it has entered constant voltage mode, the four hour safety timer is started. After the safety timer expires, charging of the battery will terminate and no more current will be delivered. Automatic Recharge After the battery charger terminates, it will remain off drawing only microamperes of current from the battery. If the portable product remains in this state long enough, the battery will eventually self discharge. To ensure that the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below VRECHRG (typically 4.1V for LTC3577-3 and 4V for LTC3577-4). In the event that the safety timer is running when the battery voltage falls below VRECHRG, the timer will reset back to zero. To prevent brief excursions below VRECHRG from resetting the safety timer, the battery voltage must be below VRECHRG for more than 1.3ms. The charge cycle and safety timer will also restart if the VBUS UVLO cycles low and then high (e.g., VBUS, is removed and then replaced). Charge Current The charge current is programmed using a single resistor from PROG to ground. 1/1000th of the battery charge current is delivered to PROG which will attempt to servo to 1.000V. Thus, the battery charge current will try to reach 1000 times the current in the PROG pin. The program resistor and the charge current are calculated using the following equations: RPROG = 1000 V 1000 V ,ICHG = ICHG RPROG
In either the constant-current or constant-voltage charging modes, the PROG pin voltage will be proportional to the actual charge current delivered to the battery. Therefore, the actual charge current can be determined at any time by monitoring the PROG pin voltage and using the following equation: IBAT = VPROG * 1000 RPROG
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LTC3577-3/LTC3577-4 OPERATION
In many cases, the actual battery charge current, IBAT , will be lower than ICHG due to limited input current available and prioritization with the system load drawn from VOUT . Thermal Regulation To prevent thermal damage to the IC or surrounding components, an internal thermal feedback loop will automatically decrease the programmed charge current if the die temperature rises to approximately 110C. Thermal regulation protects the LTC3577-3/LTC3577-4 from excessive temperature due to high power operation or high ambient thermal conditions and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the LTC3577-3/LTC3577-4 or external components. The benefit of the LTC3577-3/LTC3577-4 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions with the assurance that the battery charger will automatically reduce the current in worst-case conditions. Charge Status Indication The CHRG pin indicates the status of the battery charger. An open-drain output, the CHRG pin can drive an indicator LED through a current limiting resistor for human interfacing or simply a pull-up resistor for microprocessor interfacing. When charging begins, CHRG is pulled low and remains low for the duration of a normal charge cycle. When charging is complete, i.e., the charger enters constant voltage mode and the charge current has dropped to one-tenth of the programmed value, the CHRG pin is released (high impedance). The CHRG pin does not respond to the C/10 threshold if the LTC3577-3/LTC3577-4 are in input current limit. This prevents false end-of-charge indications due to insufficient power available to the battery charger. Even though charging is stopped during an NTC fault the CHRG pin will stay low indicating that charging is not complete. Battery Charger Stability Considerations The LTC3577-3/LTC3577-4's battery charger contains both a constant-voltage and a constant-current control loop. The constant-voltage loop is stable without any compensation when a battery is connected with low impedance leads. Excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1F from BAT to GND. Furthermore, a 4.7F capacitor in series with a 0.2 to 1 resistor from BAT to GND is required to keep ripple voltage low when the battery is disconnected. High value, low ESR multilayer ceramic chip capacitors reduce the constant-voltage loop phase margin, possibly resulting in instability. Ceramic capacitors up to 22F may be used in parallel with a battery, but larger ceramics should be decoupled with 0.2 to 1 of series resistance. In constant-current mode, the PROG pin is in the feedback loop rather than the battery voltage. Because of the additional pole created by any PROG pin capacitance, capacitance on this pin must be kept to a minimum. With no additional capacitance on the PROG pin, the battery charger is stable with program resistor values as high as 25k. However, additional capacitance on this node reduces the maximum allowed program resistor. The pole frequency at the PROG pin should be kept above 100kHz. Therefore, if the PROG pin has a parasitic capacitance, CPROG, the following equation should be used to calculate the maximum resistance value for RPROG: RPROG 1 2 * 100kHz * CPROG
NTC Thermistor and Battery Voltage Reduction The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor close to the battery pack. To use this feature connect the NTC
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LTC3577-3/LTC3577-4 OPERATION
thermistor, RNTC, between the NTC pin and ground and a bias resistor, RNOM, from NTCBIAS to NTC. RNOM should be a 1% resistor with a value equal to the value of the chosen NTC thermistor at 25C (R25). The LTC3577-3/ LTC3577-4 will pause charging when the resistance of the NTC thermistor drops to 0.54 times the value of R25 or approximately 54k (for a Vishay "Curve 1" thermistor, this corresponds to approximately 40C). If the battery charger is in constant voltage (float) mode, the safety timer also pauses until the thermistor indicates a return to a valid temperature. As the temperature drops, the resistance of the NTC thermistor rises. The LTC3577-3/LTC3577-4 are also designed to pause charging when the value of the NTC thermistor increases to 3.25 times the value of R25. For a Vishay "Curve 1" thermistor this resistance, 325k, corresponds to approximately 0C. The hot and cold comparators each have approximately 3C of hysteresis to prevent oscillation about the trip point. The typical NTC circuit is shown in Figure 3. To improve safety and reliability the battery voltage is reduced when the battery temperature becomes excessively high. When the resistance of the NTC thermistor drops to about 0.35 times the value of R25 or approximately 35k
NTCBIAS 34 RNOM 100k NTC 35 0.76 * NTCBIAS
(for a Vishay "Curve 1" thermistor, this corresponds to approximately 50C) the NTC enables circuitry to monitor the battery voltage. If the battery voltage is above the battery discharge threshold (about 3.9V) then the battery discharge circuitry is enabled and draws about 140mA from the battery when VBUS = 0V and about 180mA when VBUS = 5V. The battery discharge current is disabled below the battery discharge threshold. When the charger is disabled an internal watchdog timer samples the NTC thermistor for about 150s every 150ms and will enable the battery monitoring circuitry if the battery temperature exceeds the NTC TOO_HOT threshold. If adding a capacitor to the NTC pin for filtering the time constant must be much less than 150s so that the NTC pin can settle to its final value during the sampling period. A time constant less than 10s is recommended. Once the battery monitoring circuitry is enabled it will remain enabled and monitoring the battery voltage until the battery temperature falls back below the discharge temperature threshold. The battery discharge circuitry is only enabled if the battery voltage is greater than the battery discharge threshold.
NTC BLOCK
LTC3577-3/ LTC3577-4
-
TOO_COLD
+
RNTC 100k 0.35 * NTCBIAS
-
TOO_HOT
+
0.26 * NTCBIAS
+
BATTERY OVERTEMP
-
357734 F03
Figure 3. Typical NTC Thermistor Circuit
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LTC3577-3/LTC3577-4 OPERATION
Alternate NTC Thermistors and Biasing The LTC3577-3/LTC3577-4 provide temperature qualified charging if a grounded thermistor and a bias resistor are connected to NTC. By using a bias resistor whose value is equal to the room temperature resistance of the thermistor (R25) the upper and lower temperatures are pre-programmed to approximately 40C and 0C, respectively (assuming a Vishay "Curve 1" thermistor). The upper and lower temperature thresholds can be adjusted by either a modification of the bias resistor value or by adding a second adjustment resistor to the circuit. If only the bias resistor is adjusted, then either the upper or the lower threshold can be modified but not both. The other trip point will be determined by the characteristics of the thermistor. Using the bias resistor in addition to an adjustment resistor, both the upper and the lower temperature trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. Examples of each technique are given below. NTC thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. The Vishay-Dale thermistor NTHS0603N011-N1003F used , in the following examples, has a nominal value of 100k and follows the Vishay "Curve 1" resistance-temperature characteristic. In the explanation below, the following notation is used. R25 = Value of the thermistor at 25C RNTC|COLD = Value of thermistor at the cold trip point RNTC|HOT = Value of the thermistor at the hot trip point rCOLD = Ratio of RNTC|COLD to R25 rHOT = Ratio of RNTC|HOT to R25 RNOM = Primary thermistor bias resistor (see Figure 3) R1 = Optional temperature range adjustment resistor (see Figure 4)
NTCBIAS 34 RNOM 105k NTC 35 R1 12.7k 0.76 * NTCBIAS
NTC BLOCK
LTC3577-3/ LTC3577-4
-
TOO_COLD
+
-
RNTC 100k TOO_HOT 0.35 * NTCBIAS
+
0.26 * NTCBIAS
+
BATTERY OVERTEMP
-
357734 F04
Figure 4. NTC Thermistor Circuit with Additional Bias Resistor
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LTC3577-3/LTC3577-4 OPERATION
The trip points for the LTC3577-3/LTC3577-4's temperature qualification are internally programmed at 0.35 * VNTC for the hot threshold and 0.76 * VNTC for the cold threshold. Therefore, the hot trip point is set when: RNTCHOT | RNOM + RNTCHOT | * NTCBIAS = 0.35 * NTCBIAS where rHOT and rCOLD are the resistance ratios at the desired hot and cold trip points. Note that these equations are linked. Therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the IC. Consider an example where a 60C hot trip point is desired. From the Vishay Curve 1 R-T characteristics, rHOT is 0.2488 at 60C. Using the above equation, RNOM should be set to 46.4k. With this value of RNOM, the cold trip point is about 16C. Notice that the span is now 44C rather than the previous 40C. This is due to the decrease in "temperature gain" of the thermistor as absolute temperature increases. The upper and lower temperature trip points can be independently programmed by using an additional bias resistor as shown in Figure 4. The following formulas can be used to compute the values of RNOM and R1: RNOM = rCOLD - rHOT * R25 2.714
and the cold trip point is set when: RNTC|COLD RNOM + RNTC|COLD * NTCBIAS = 0.76 * NTCBIAS
Solving these equations for RNTC|COLD and RNTC|HOT results in the following: RNTC|HOT = 0.538 * RNOM and RNTC|COLD = 3.17 * RNOM By setting RNOM equal to R25, the above equations result in rHOT = 0.538 and rCOLD = 3.17. Referencing these ratios to the Vishay Resistance-Temperature Curve 1 chart gives a hot trip point of about 40C and a cold trip point of about 0C. The difference between the hot and cold trip points is approximately 40C. By using a bias resistor, RNOM, different in value from R25, the hot and cold trip points can be moved in either direction. The temperature span will change somewhat due to the non-linear behavior of the thermistor. The following equations can be used to easily calculate a new value for the bias resistor: RNOM = RNOM = rHOT * R25 0.538 rCOLD * R25 3.17
R1 = 0.536 * RNOM - rHOT * R25 For example, to set the trip points to 0C and 45C with a Vishay Curve 1 thermistor choose: RNOM = 3.266 - 0.4368 * 100k = 104.2k 2.714
the nearest 1% value is 105k. R1 = 0.536 * 105k - 0.4368 * 100k = 12.6k the nearest 1% value is 12.7k. The final solution is shown in Figure 4 and results in an upper trip point of 45C and a lower trip point of 0C.
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LTC3577-3/LTC3577-4 OPERATION
Overvoltage Protection (OVP) The LTC3577-3/LTC3577-4 can protect themselves from the inadvertent application of excessive voltage to VBUS or WALL with just two external components: an N-channel FET and a 6.2k resistor. The maximum safe overvoltage magnitude will be determined by the choice of the external NMOS and its associated drain breakdown voltage. The overvoltage protection module consists of two pins. The first, OVSENS, is used to measure the externally applied voltage through an external resistor. The second, OVGATE, is an output used to drive the gate pin of an external FET. The voltage at OVSENS will be lower than the OVP input voltage by (IOVSENS * 6.2k) due to the OVP circuit's quiescent current. The OVP input will be 200mV to 400mV higher than OVSENS under normal operating conditions. When OVSENS is below 6V, an internal charge pump will drive OVGATE to approximately 1.88 * OVSENS. This will enhance the N-channel FET and provide a low impedance connection to VBUS or WALL which will, in turn, power the LTC3577-3/LTC3577-4. If OVSENS should rise above 6V (6.35V OVP input) due to a fault or use of an incorrect wall adapter, OVGATE will be pulled to GND, disabling the external FET to protect downstream circuitry. When the voltage drops below 6V again, the external FET will be re-enabled. In an overvoltage condition, the OVSENS pin will be clamped at 6V. The external 6.2k resistor must be sized appropriately to dissipate the resultant power. For example, a 1/10W 6.2k resistor can have at most
MN1 V1 WALL LTC3577-3/ LTC3577-4 OVGATE V2 D2 D1 MN2 C1 VBUS
PMAX * 6.2k = 24V applied across its terminals. With the 6V at OVSENS, the maximum overvoltage magnitude that this resistor can withstand is 30V. A 1/4W 6.2k resistor raises this value to 45V. The charge pump output on OVGATE has limited output drive capability. Care must be taken to avoid leakage on this pin, as it may adversely affect operation. Dual Input Overvoltage Protection It is possible to protect both VBUS and WALL from overvoltage damage with several additional components, as shown in Figure 5. Schottky diodes D1 and D2 pass the larger of V1 and V2 to R1 and OVSENS. If either V1 or V2 exceeds 6V plus VF(SCHOTTKY), OVGATE will be pulled to GND and both the WALL and USB inputs will be protected. Each input is protected up to the drain-source breakdown, BVDSS, of MN1 and MN2. R1 must also be rated for the power dissipated during maximum overvoltage. See the "Overvoltage Protection" section for an explanation of this calculation. Table 2 shows some NMOS FETs that maybe suitable for overvoltage protection.
Table 2. Recommended Overvoltage FETs
NMOS FET Si1472DH Si2302ADS Si2306BDS Si2316BDS IRLML2502 BVDSS 30V 20V 30V 30V 20V RON 82m 60m 65m 80m 35m PACKAGE SC70-6 SOT-23 SOT-23 SOT-23 SOT-23
R1 OVSENS
357734 F05
Figure 5. Dual Input Overvoltage Protection
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LTC3577-3/LTC3577-4 OPERATION
Reverse Input Voltage Protection The LTC3577-3/LTC3577-4 can also be easily protected against the application of reverse voltage as shown in Figure 6. D1 and R1 are necessary to limit the maximum VGS seen by MP1 during positive overvoltage events. D1's breakdown voltage must be safely below MP1's BVGS. The circuit shown in Figure 6 offers forward voltage protection up to MN1's BVDSS and reverse voltage protection up to MP1's BVDSS.
USB/WALL ADAPTER MP1 D1 R1 500k R2 6.2k MN1 VBUS C1 LTC3577-3/ LTC3577-4 OVGATE OVSENS
357734 F06 D1: 5.6V ZENER MP1: Si2323 DS, BVDSS = 20V VBUS POSITIVE PROTECTION UP TO BVDSS OF MN1 VBUS NEGATIVE PROTECTION UP TO BVDSS OF MP1
When disabled all LDO circuitry is powered off leaving only a few nanoamps of leakage current on the LDO supply. Both LDO outputs are individually pulled to ground through internal resistors when disabled. The power good status bits of LDO1 and LDO2 are available in I2C through the read-back registers PGLDO[1] and PGLDO[2] for LDO1 and LDO2 respectively. The power good comparators for both LDOs are sampled when the I2C port receives the correct I2C read address. Figure 7 shows the LDO application circuit. The full-scale output voltage for each LDO is programmed using a resistor divider from the LDO output (LDO1 or LDO2) connected to the feedback pins (LDO1_FB or LDO2_FB) such that: R1 VLDOx = 0.8 V * +1 R2 For stability, each LDO output must be bypassed to ground with a minimum 1F ceramic capacitor (COUT).
VINLDOx
Figure 6. Dual Polarity Voltage Protection
LOW DROPOUT LINEAR REGULATOR OPERATION LDO Operation and Voltage Programming The LTC3577-3/LTC3577-4 contain two 150mA adjustable output LDO regulators. The first LDO (LDO1) is always on and will be enabled whenever VOUT is greater than VOUT UVLO. The second LDO (LDO2) is controlled by the pushbutton and is the first supply to sequence up in response to pushbutton application. Both LDOs are disabled when VOUT is less than VOUT UVLO and LDO2 is further disabled when the pushbutton circuity is in the power down or power off states. Both LDOs contain a soft-start function to limit inrush current when enabled. The soft-start function works by ramping up the LDO reference over a 200s period (typical) when the LDO is enabled.
LDOxEN 0 1 MP LDOx R1 LDOx_FB 0.8V GND COUT LDOx OUTPUT
R2
357734 F07
Figure 7. LDO Application Circuit
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LTC3577-3/LTC3577-4 OPERATION
STEP-DOWN SWITCHING REGULATOR OPERATION Introduction The LTC3577-3/LTC3577-4 include three 2.25MHz constant-frequency current mode step-down switching regulators providing 500mA, 500mA and 800mA each. All step-down switching regulators can be programmed for a minimum output voltage of 0.8V and can be used to power a microcontroller core, microcontroller I/O, memory or other logic circuitry. All step-down switching regulators support 100% duty cycle operation (low dropout mode) when the input voltage drops very close to the output voltage and are also capable of Burst Mode operation for highest efficiencies at light loads. Burst Mode operation is individually selectable for each step-down switching regulator through the I2C register bits BK1BRST, BK2BRST and BK3BRST. The step-down switching regulators also include soft-start to limit inrush current when powering on, short-circuit current protection, and switch node slew limiting circuitry to reduce EMI radiation. No external compensation components are required for the switching regulators. Switching regulators 1 and 2 (Buck1 and Buck2) are sequenced up and down together through the pushbutton interface (see "Pushbutton Interface" section for more information), while Buck3 has an individual enable pin (EN3) that is active when the pushbutton is in the power up or power on states. Buck3 is disabled in the power down and power off states. It is recommended that the step-down switching regulator input supplies (VIN12 and VIN3) be connected to the system supply pin (VOUT). This is recommended because the undervoltage lockout circuit on the VOUT pin (VOUT UVLO) disables the stepdown switching regulators when the VOUT voltage drops below the VOUT UVLO threshold. If driving the step-down switching regulator input supplies from a voltage other than VOUT the regulators should not be operated outside the specified operating range as operation is not guaranteed beyond this range. Output Voltage Programming Figure 8 shows the step-down switching regulator application circuit. The full-scale output voltage for each step-down switching regulator is programmed using a
EN MODE PWM SLEW CONTROL VIN
MP MN
SWx
L VOUTx CFB R1 COUT
FBx 0.8V GND
R2
357734 F08
Figure 8. Step-Down Switching Regulator Application Circuit
resistor divider from the step-down switching regulator output connected to the feedback pins (FB1, FB2 and FB3) such that: R1 VOUTx = 0.8 V * +1 R2 Typical values for R1 are in the range of 40k to 1M. The capacitor CFB cancels the pole created by feedback resistors and the input capacitance of the FB pin and also helps to improve transient response for output voltages much greater than 0.8V. A variety of capacitor sizes can be used for CFB but a value of 10pF is recommended for most applications. Experimentation with capacitor sizes between 2pF and 22pF may yield improved transient response. Operating Modes The step-down switching regulators include two possible operating modes to meet the noise/power needs of a variety of applications. In pulse-skipping mode, an internal latch is set at the start of every cycle, which turns on the main P-channel MOSFET switch. During each cycle, a current comparator compares the peak inductor current to the output of an error amplifier. The output of the current comparator resets the internal latch, which causes the main P-channel MOSFET switch to turn off and the N-channel MOSFET synchronous rectifier to turn on. The N-channel MOSFET synchronous rectifier turns off at the end of the 2.25MHz cycle or if the current through the N-channel MOSFET synchronous rectifier drops to zero. Using this method of operation, the error amplifier adjusts the peak
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LTC3577-3/LTC3577-4 OPERATION
inductor current to deliver the required output power. All necessary compensation is internal to the step-down switching regulator requiring only a single ceramic output capacitor for stability. At light loads in pulse-skipping mode, the inductor current may reach zero on each pulse which will turn off the N-channel MOSFET synchronous rectifier. In this case, the switch node (SW1, SW2 or SW3) goes high impedance and the switch node voltage will "ring". This is discontinuous operation, and is normal behavior for a switching regulator. At very light loads in pulse-skipping mode, the step-down switching regulators will automatically skip pulses as needed to maintain output regulation. At high duty cycle (VOUTX approaching VINX) it is possible for the inductor current to reverse at light loads causing the stepped down switching regulator to operate continuously. When operating continuously, regulation and low noise output voltage are maintained, but input operating current will increase to a few milliamps. In Burst Mode operation, the step-down switching regulators automatically switch between fixed frequency PWM operation and hysteretic control as a function of the load current. At light loads the step-down switching regulators control the inductor current directly and use a hysteretic control loop to minimize both noise and switching losses. While operating in Burst Mode operation, the output capacitor is charged to a voltage slightly higher than the regulation point. The step-down switching regulator then goes into sleep mode, during which the output capacitor provides the load current. In sleep mode, most of the switching regulator's circuitry is powered down, helping conserve battery power. When the output voltage drops below a pre-determined value, the step-down switching regulator circuitry is powered on and another burst cycle begins. The sleep time decreases as the load current increases. Beyond a certain load current point (about 1/4 rated output load current) the step-down switching regulators will switch to a low noise constant frequency PWM mode of operation, much the same as pulse-skipping operation at high loads. For applications that can tolerate some output ripple at low output currents, Burst Mode operation provides better efficiency than pulse-skipping at light loads. The step-down switching regulators allow mode transition on-the-fly, providing seamless transition between modes even under load. This allows the user to switch back and forth between modes to reduce output ripple or increase low current efficiency as needed. Burst Mode operation is individually selectable for each step-down switching regulator through the I2C register bits BK1BRST, BK2BRST and BK3BRST. Shutdown The step-down switching regulators (Buck1, Buck2 and Buck3) are shut down when the pushbutton circuitry is in the power-down or power-off state. Step-down switching regulator 3 (Buck3) can also be shut down by bringing the EN3 input low. In shutdown all circuitry in the step-down switching regulator is disconnected from the switching regulator input supply leaving only a few nanoamps of leakage current. The step-down switching regulator outputs are individually pulled to ground through internal 10k resistors on the switch pin (SW1, SW2 or SW3) when in shutdown. Dropout Operation It is possible for a step-down switching regulator's input voltage to approach its programmed output voltage (e.g., a battery voltage of 3.4V with a programmed output voltage of 3.3V). When this happens, the PMOS switch duty cycle increases until it is turned on continuously at 100%. In this dropout condition, the respective output voltage equals the regulator's input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. Soft-Start Operation Soft-start is accomplished by gradually increasing the peak inductor current for each step-down switching regulator over a 500s period. This allows each output to rise slowly, helping minimize inrush current required to charge up the switching regulator output capacitor. A soft-start cycle occurs whenever a given switching regulator is enabled. A soft-start cycle is not triggered by changing operating modes. This allows seamless output transition when actively changing between operating modes.
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Slew Rate Control The step-down switching regulators contain new patent pending circuitry to limit the slew rate of the switch node (SW1, SW2 and SW3). This new circuitry is designed to transition the switch node over a period of a few nanoseconds, significantly reducing radiated EMI and conducted supply noise while maintaining high efficiency. Since slowing the slew rate of the switch nodes causes efficiency loss, the slew rate of the step-down switching regulators is adjustable via the I2C registers SLEWCTL1 and SLEWCTL2. This allows the user to optimize efficiency or EMI as necessary with four different slew rate settings. The power up default is the fastest slew rate (highest efficiency) setting. Figures 9 and 10 show the efficiency and power loss graph for Buck3 programmed for 1.2V and 2.5V outputs. Note that the power loss curves remain fairly constant for both graphs yet changing the slew rate has a larger effect on the 1.2V output efficiency. This is mainly because for a given output current the 2.5V output is delivering more than 2x the power than the 1.2V output. Efficiency will always decrease and show more variation to slew rate as the programmed output voltage is decreased. Low Supply Operation An undervoltage lockout circuit on VOUT (VOUT UVLO) shuts down the step-down switching regulators when VOUT drops below about 2.7V. It is recommended that the stepdown switching regulator input supplies (VIN12, VIN3) be connected to the power path output (VOUT) directly. This
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1.00E-05 1.00E-0.3 IOUT3 (mA) Burst Mode OPERATION VIN = 3.8V SW[1:0] = 00 01 10 11 1.00E-01
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UVLO prevents the step-down switching regulators from operating at low supply voltages where loss of regulation or other undesirable operation may occur. If driving the step-down switching regulator input supplies from a voltage other than the VOUT pin, the regulators should not be operated outside the specified operating range as operation is not guaranteed beyond this range. Inductor Selection Many different sizes and shapes of inductors are available from numerous manufacturers. Choosing the right inductor from such a large selection of devices can be overwhelming, but following a few basic guidelines will make the selection process much simpler. The step-down switching regulators are designed to work with inductors in the range of 2.2H to 10H. For most applications a 4.7H inductor is suggested for step-down switching regulators providing up to 500mA of output current while a 3.3H inductor is suggested for step-down switching regulators providing up to 800mA. Larger value inductors reduce ripple current, which improves output ripple voltage. Lower value inductors result in higher ripple current and improved transient response time, but will reduce the available output current. To maximize efficiency, choose an inductor with a low DC resistance. For a 1.2V output, efficiency is reduced about 2% for 100m series resistance at 400mA load current, and about 2% for 300m series resistance at 100mA load current. Choose an inductor with a DC current rating at least 1.5 times larger than the maximum load current to
1.00E+00
100 90
1.00E+00
1.00e-01 POWER LOSS (W) EFFICIENCY (%)
80 70 60 50 40 30 20 10 Burst Mode OPERATION VIN = 3.8V SW[1:0] = 00 01 10 11 1.00E-0.3 IOUT3 (mA) 1.00E-01
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1.00e-01 POWER LOSS (W)
1.00E-02
1.00E-02
1.00E-03
1.00E-03
1.00E-04
1.00E-04
1.00E-05
0 1.00E-05
1.00E-05
Figure 9. VOUT3 (1.2V) Efficiency and Power Loss vs IOUT3
Figure 10. VOUT3 (2.5V) Efficiency and Power Loss vs IOUT3
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LTC3577-3/LTC3577-4 OPERATION
ensure that the inductor does not saturate during normal operation. If output short circuit is a possible condition, the inductor should be rated to handle the maximum peak current specified for the step-down converters. Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or Permalloy materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. Inductors that are very thin or have a very small volume typically have much higher core and DCR losses, and will not give the best efficiency. The choice of which style inductor to use often depends more on the price versus size, performance, and any radiated EMI requirements than on what the step-down switching regulators requires to operate. The inductor value also has an effect on Burst Mode operation. Lower inductor values will cause Burst Mode switching frequency to increase. Table 3 shows several inductors that work well with the step-down switching regulators. These inductors offer a good compromise in current rating, DCR and physical size. Consult each manufacturer for detailed information on their entire selection of inductors. Input/Output Capacitor Selection Low ESR (equivalent series resistance) ceramic capacitors should be used at both step-down switching regulator outputs as well as at each step-down switching regulator input supply. Only X5R or X7R ceramic capacitors should be used because they retain their capacitance over wider voltage and temperature ranges than other ceramic types. A 10F output capacitor is sufficient for the step-down switching regulator outputs. For good transient response and stability the output capacitor for step-down switching regulators should retain at least 4F of capacitance over operating temperature and bias voltage. Each switching regulator input supply should be bypassed with a 2.2F capacitor. Consult with capacitor manufacturers for detailed information on their selection and specifications of ceramic capacitors. Many manufacturers now offer
Table 3. Recommended Inductors for Step-Down Switching Regulators
INDUCTOR TYPE DB318C D312C DE2812C CDRH3D16 CDRH2D11 CLS4D09 SD3118 SD3112 SD12 SD10 LPS3015 *Typical DCR L (H) 4.7 3.3 4.7 3.3 4.7 3.3 4.7 3.3 4.7 3.3 4.7 4.7 3.3 4.7 3.3 4.7 3.3 4.7 3.3 4.7 3.3 MAX IDC (A) 1.07 1.20 0.79 0.90 1.15 1.37 0.9 1.1 0.5 0.6 0.75 1.3 1.59 0.8 0.97 1.29 1.42 1.08 1.31 1.1 1.3 MAX DCR () 0.1 0.07 0.24 0.20 0.13* 0.105* 0.11 0.085 0.17 0.123 0.19 0.162 0.113 0.246 0.165 0.117* 0.104* 0.153* 0.108* 0.2 0.13 SIZE in mm (L x W x H) 3.8 x 3.8 x 1.8 3.8 x 3.8 x 1.8 3.6 x 3.6 x 1.2 3.6 x 3.6 x 1.2 3.0 x 2.8 x 1.2 3.0 x 2.8 x 1.2 4 x 4 x 1.8 4 x 4 x 1.8 3.2 x 3.2 x 1.2 3.2 x 3.2 x 1.2 4.9 x 4.9 x 1 3.1 x 3.1 x 1.8 3.1 x 3.1 x 1.8 3.1 x 3.1 x 1.2 3.1 x 3.1 x 1.2 5.2 x 5.2 x 1.2 5.2 x 5.2 x 1.2 5.2 x 5.2 x 1.0 5.2 x 5.2 x 1.0 3.0 x 3.0 x 1.5 3.0 x 3.0 x 1.5 MANUFACTURER Toko www.toko.com
Sumida www.sumida.com
Cooper www.cooperet.com
Coil Craft www.coilcraft.com
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LTC3577-3/LTC3577-4 OPERATION
very thin (<1mm tall) ceramic capacitors ideal for use in height-restricted designs. Table 4 shows a list of several ceramic capacitor manufacturers.
Table 4. Ceramic Capacitor Manufacturers
AVX Murata Taiyo Yuden Vishay Siliconix TDK www.avxcorp.com www.murata.com www.t-yuden.com www.vishay.com www.tdk.com
LED Boost Operation The LED boost converter is designed for very high duty cycle operation and can boost from 3V to 40V out for load currents up to 20mA. The boost converter also features overvoltage protection to protect the output in case of an open circuit in the LED string. The overvoltage protection threshold is set by adjusting R1 in Figure 11 such that: BOOST(MAX) = 800mV * R1 + LED _ OV 10 * R2
LED BACKLIGHT/BOOST OPERATION Introduction The LED driver uses a constant frequency, current mode boost converter to supply power for up to 10 series LEDs. As shown in Figure 11 the series string of LEDs is connected from the output of the boost converter (BOOST) to the ILED pin. Under normal operation the boost converter BOOST output will be driven to a voltage where the ILED pin regulates at approximately 300mV to 400mV. The ILED pin is a constant current sink that is programmed via I2C "LED DAC register". The LED can be further controlled using I2C to program brightness levels and soft turn-on/ turn-off effects. See the "I2C Interface" section for more information on programming the ILED current. The boost converter also includes an overvoltage protection feature to limit the BOOST output voltage as well as variable slew rate control of the SW pin to reduce EMI.
C1 22F VOUT LTC3577-3/ LTC3577-4 SW SW SW LED_OV 18 19 20 9 39 L1 10H LPS4018-103ML D12 ZLLS400 BOOST R1 10M R2 20k C2 1F 50V C3 D1 22nF 50V D2 D3 D4 D5
where LED_OV is approximately 1.0V. In the case of Figure 11 BOOST(MAX) is set to 40V for a 10-LED string. Capacitor C3 provides soft-start, limiting the inrush current when the boost converter is first enabled. C3 provides feedback to the ILED pin. This feedback limits the rise time of output voltage and the inrush current while the output capacitor, C2, is charging. The boost converter will be operated in either continuous conduction mode, discontinuous conduction mode or pulse-skipping mode depending on the inductor current required for regulation. LED Constant Current Sink The LED driver uses a precision current sink to regulate the LED current up to 20mA. The current sink is programmed via I2C "LED DAC Register" and utilizes a 6-bit 60dB exponential DAC. This DAC provides accurate current control from 20A to 20mA with approximately 1dB per step for ILED(FS) = 20mA. The LED current can be approximated by the following equations: ILED = ILED(FS)
DAC - 63 3 * 63 * 10
(1)
0.8 V * 500 ILED(FS) = R2 where DAC is the decimal value programmed into the I2C "LED DAC register". For example with ILED(FS) = 20mA and DAC[5:0] = 000000 (0 decimal) ILED equates to 20A, while DAC[5:0] = 111111 (63 decimal) ILED equates to 20mA. As a final example DAC[5:0] = 101010 is 42 decimal
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ILED_FS ILED
3 22
D10 D9
D8
D7
D6
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Figure 11. LED Boost Application Circuit
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LTC3577-3/LTC3577-4 OPERATION
and equates to ILED = 2mA for ILED(FS) = 20mA. The DAC approximates Equation 1 using the nominal values in Table 5. The differences between the approximation equation and the table are due to design of the DAC using eight linear segments that approximate the exponential function.
Table 5. LED DAC Codes to Output Current
DAC Codes 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Output Current 20.0A 23.5A 27.0A 30.5A 34.0A 37.6A 41.1A 44.6A 48.1A 56.5A 65.0A 73.4A 81.9A 90.3A 98.7A 107A 116A 136A 156A 177A 197A 217A 237A 258A 278A 327A 376A 424A 473A 522A 571A 620A DAC Codes 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 Output Current 668A 786A 903A 1.02mA 1.14mA 1.26mA 1.37mA 1.49mA 1.61mA 1.89mA 2.17mA 2.45mA 2.74mA 3.02mA 3.30mA 3.58mA 3.86mA 4.54mA 5.22mA 5.90mA 6.58mA 7.26mA 7.93mA 8.61mA 9.29mA 10.8mA 12.4mA 13.9mA 15.4mA 17.0mA 18.5mA 20.0mA
current may be adjusted but the accuracy of the output current will be degraded the further it is programmed from 20mA. The LED_FS pin is current limited and will only source about 80A. This protects the pin and limits the ILED current in a case where LED_FS is shorted to ground, it is not recommended to program the LED current above 25mA. LED Gradation The LED driver features an automatic gradation circuit. The gradation circuit ramps the LED current up when the LED driver is enabled and ramps the current down when the LED driver is disabled. The DAC is enabled and disabled with the EN bit of the I2C "LED control register". The gradation function is automatic when enabling and disabling the LED driver; only the gradation speed needs to be programmed to use this function. The gradation speed is set by the GR1 and GR2 bits of the I2C "LED control register" which allows transitions times of approximately 15ms, one-half second, one second and two seconds. See the "I2C Interface" section for more information. The gradation function allows the LEDs to turn on and off gradually as opposed to an abrupt step. LED PWM vs Constant Current Operation The LED driver provides both linear LED current mode as well as PWM LED current mode. These modes are selected through the MD1 and MD2 bits of the I2C "LED control register". When both bits are "0" the LED boost converter is in constant current (CC) mode and the ILED current sink is constant whose value is set by the DAC[5:0] bits of the I2C"LED DAC register". Setting MD1 to "0" and MD2 to "1" selects the LED PWM mode. In this mode the LED driver is pulsed using an internally generated PWM signal. The PWM mode may be used to reduce the LED intensity for a given programmed current. When dimming via PWM the LED driver and boost converter are both turned on and off together. This allows some degree of additional control over the LED current, and in some cases may offer a more efficient method of dimming since the boost could be operated at an optimal efficiency point and pulsed for the desired LED intensity.
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The full-scale LED current is set using a resistor (R2 in Figure 11) connected between the LED_FS pin and ground. Typically R2 should be set to 20k to give 20mA of LED current at full scale. The resistance may be increased to decrease the current or the resistance may be decreased to increase the LED current. The DAC has been optimized for best performance at 20mA full scale. The full-scale
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LTC3577-3/LTC3577-4 OPERATION
The PWM mode, if enabled, is set up using 3 values, PWMNUM [3:0] and PWMDEN [3:0] in the I2C "LED PWM Register" and PWMCLK, set by PWMC2 and PWMC1 in the I2C "LED Control Register." Duty Cycle = Frequency = PWMNUM PWMDEN PWMCLK PWMDEN
PWMC1 0 1 0 1 PWMCLK 8.77kHz 4.39kHz 2.92kHz 2.19kHz
Fixed Boost Output Setting MD1 to 1 and MD2 to 0 selects the fixed high voltage boost mode. This mode can be used to generate output voltages at or greater than VOUT . When configured as a boost converter the ILED pin becomes the feedback pin, and the boost will regulate the output voltage such that the voltage on the ILED pin is 800mV. Figure 12 shows a fixed 12V output generated using the boost converter in the fixed high voltage boost mode. Any output voltage up to 40V may be programmed by selecting appropriate values for the R1 and R2 voltage divider from the equation: R1 VBOOST = 0.8 V * +1 R2 Values for R2 should be kept below 24.3k to keep the pole at the ILED pin beyond cross over. The boost is designed primarily as a high voltage and high duty cycle converter. When operating with a lower boost ratio, a larger output capacitor, 10F should be used. Op, erating with a very low duty cycle will cause cycle skipping which will increase ripple.
C1 22F VOUT ILED_FS LTC3577-3/ LTC3577-4 SW SW SW ILED LED_OV 39 3 L4 10H LPS4018-103ML D12 ZLLS400 R1 301k R2 21.5k
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Table 6. PWM Clock Frequency
PWMC2 0 0 1 1
Using the PWM control, a 4-bit internally generated PWM is possible as additional dimming. Using these control bits a number of PWM duty cycles and frequencies are available in the 100Hz to 500Hz range. This range was selected to be below the audio range and above the frequency where the PWM is visible. For example, given PWMC2 = 1, PWMC1 = 0, PWMNUM[3:0] = 0111 and PWMDEN[3:0] = 1100 then the duty cycle will be 58.3% and PWM frequency will be 243Hz. If PWMNUM is set to 0 then the duty cycle will be 0% and the current sink will effectively be off. If PWMNUM is ever programmed to a value larger than PWMDEN the duty cycle will be 100% and the current sink will effectively be constant. PWMDEN and PWMNUM may both be changed to result in 73 different duty cycle possibilities and 41 different PWM frequencies between 8.77kHz and 100Hz. When PWM mode is enabled a small (2A) standby current source is always enabled on the LED pin. The purpose of this is to have some current flowing in the LED's at all times. This helps to reduce the magnitude of the voltage swing on the LED pin as the current is pulsed on and off.
18 19 20 22
800mV VREF
BOOST C2 10F 10V
9
Figure 12. Fixed 12V/75mA Boost Output Application
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LTC3577-3/LTC3577-4 OPERATION
To keep the average steady-state inductor current below 300mA the maximum output current is reduced as programmed output voltage increases. The output current available is given by: IBOOST(MAX ) = 300mA * VOUT(MIN) VBOOST Diode Selection When boosting to increasingly higher voltages, parasitic capacitance at the switch pin becomes an increasing large component of the switching loses. For this reason it is important to minimize the capacitance on the switch node. The diode selected should be sized to handle the peak inductor current and the average output current. At high boost voltages a diode with the lowest possible junction capacitance will often result in a more efficient solution than one with a lower forward drop. I2C OPERATION I2C Interface The LTC3577-3/LTC3577-4 may communicate with a bus master using the standard I2C 2-wire interface. The Timing Diagram shows the relationship of the signals on the bus. The two bus lines, SDA and SCL, must be high when the bus is not in use. External pull-up resistors or current sources, such as the LTC1694 SMBus accelerator, are required on these lines. The LTC3577-3/LTC3577-4 are both a slave receiver and slave transmitter. The I2C control signals, SDA and SCL are scaled internally to the DVCC supply. DVCC should be connected to the same power supply as the bus pull-up resistors.
Note that the maximum boost output current must be set by the minimum VOUT operating voltage. If the boost converter is allowed to operate down to the VOUT UVLO then 2.5V must be assumed as the minimum operating VOUT voltage. Inductor Selection The LED boost converter is designed to work with a 10H inductor. The inductor must be able to handle a peak current of 1A and should have a low ESR value for good efficiency. Table 7 shows several inductors that work well with the LED boost converter. These inductors offer a good compromise in current rating, DCR and physical size. Consult each manufacturer for detailed information on their entire selection of inductors.
Table 7. Recommended Inductors for Boost Switching Reguators
INDUCTOR TYPE LPS4018-103 DB62LCB CDRH4D16NP-100M SD18-100-R *Typical L (H) 10 10 10 10 MAX IDC (A) 1.1 1.22 1.05 1.28 MAX DCR () 0.200 0.118 0.155 0.158* SIZE in mm (L x W x H) 4.0 x 4.0 x 1.8 6.2 x 6.2 x 2 4.8 x 4.8 x 1.8 5.2 x 5.2 x 1.8 MANUFACTURER Coil Craft www.coilcraft.com Toko www.toko.com Sumida www.sumida.com Cooper www.cooperet.com
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The I2C port has an undervoltage lockout on the DVCC pin. When DVCC is below approximately 1V, the I2C serial port is cleared and registers are set to the default configuration of all zeros. I2C Bus Speed The I2C port is designed to be operated at speeds of up to 400kHz. It has built-in timing delays to ensure correct operation when addressed from an I2C compliant master device. It also contains input filters designed to suppress glitches should the bus become corrupted. I2C START and STOP Conditions A bus master signals the beginning of communications by transmitting a START condition. A START condition is generated by transitioning SDA from HIGH to LOW while SCL is HIGH. The master may transmit either the slave write or the slave read address. Once data is written to the LTC3577-3/LTC3577-4, the master may transmit a STOP condition which commands the LTC3577-3/LTC3577-4 to act upon its new command set. A STOP condition is sent by the master by transitioning SDA from LOW to HIGH while SCL is HIGH. The bus is then free for communication with another I2C device. I2C Byte Format Each byte sent to or received from the LTC3577-3/LTC3577-4 must be 8 bits long followed by an extra clock cycle for the acknowledge bit. The data should be sent to the LTC3577-3/ LTC3577-4 most significant bit (MSB) first. I2C Acknowledge The acknowledge signal is used for handshaking between the master and the slave. When the LTC3577-3/LTC3577-4 are written to (write address), they acknowledge their write address as well as the subsequent two data bytes. When they are read from (read address), the LTC3577-3/ LTC3577-4 acknowledge their read address only. The bus master should acknowledge receipt of information from the LTC3577-3/LTC3577-4. An acknowledge (active LOW) generated by the LTC3577-3/ LTC3577-4 let the master know that the latest byte of information was received. The acknowledge related clock pulse is generated by the master. The master releases the SDA line (HIGH) during the acknowledge clock cycle. The LTC3577-3/LTC3577-4 pull down the SDA line during the write acknowledge clock pulse so that it is a stable LOW during the HIGH period of this clock pulse.
I2C Timing Diagram
DATA BYTE A ADDRESS 0 START SDA 0 0 0 1 0 0 1 0 ACK ACK ACK 0 0 1 0 0 1 WR 0 A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 STOP DATA BYTE B
SCL
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
SDA tSU, DAT tLOW SCL tHD, STA START CONDITION tr tHIGH tf REPEATED START CONDITION tSP STOP CONDITION START CONDITION tHD, DAT tSU, STA tHD, STA tBUF tSU, STO
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When the LTC3577-3/LTC3577-4 are read from, they release the SDA line so that the master may acknowledge receipt of the data. Since the LTC3577-3/LTC3577-4 only transmit one byte of data, a master not acknowledging the data sent by the LTC3577-3/LTC3577-4 has no I2C specific consequence on the operation of the I2C port. I2C Slave Address The LTC3577-3/LTC3577-4 respond to a 7-bit address which has been factory programmed to b'0001001[R/W]'. The LSB of the address byte, known as the read/write bit, should be 0 when writing data to the LTC3577-3/LTC3577-4 and 1 when reading data from it. Considering the address an eight bit word, then the write address is 0x12 and the read address is 0x13. The LTC3577-3/LTC3577-4 will acknowledge both its read and write address. I2C Sub-Addressed Writing The LTC3577-3/LTC3577-4 have four command registers for control input. They are accessed by the I2C port via a subaddressed writing system. Each write cycle of the LTC3577-3/LTC3577-4 consists of exactly three bytes. The first byte is always the LTC3577-3/ LTC3577-4's write address. The second byte represents the LTC3577-3/LTC3577-4's sub-address. The sub address is a pointer which directs the subsequent data byte within the LTC3577-3/LTC3577-4. The third byte consists of the data to be written to the location pointed to by the sub-address. The LTC3577-3/LTC3577-4 contain control registers at only four sub-address locations: 0x00, 0x01, 0x02 and 0x03. Writing to sub-addresses outside the four sub-addresses listed is not recommended as it can cause data in one of the four listed sub-addresses to be overwritten. I2C Bus Write Operation The master initiates communication with the LTC3577-3/ LTC3577-4 with a START condition and the LTC3577-3/ LTC3577-4's write address. If the address matches that of the LTC3577-3/LTC3577-4, the LTC3577-3/LTC3577-4 return an acknowledge. The master should then deliver the sub-address. Again the LTC3577-3/LTC3577-4 acknowledge and the cycle is repeated for the data byte. The data byte is transferred to an internal holding latch upon the return of its acknowledge by the LTC3577-3/ LTC3577-4. This procedure must be repeated for each sub-address that requires new data. After one or more cycles of [ADDRESS][SUB-ADDRESS][DATA], the master may terminate the communication with a STOP condition. Alternatively, a REPEAT-START condition can be initiated by the master and another chip on the I2C bus can be addressed. This cycle can continue indefinitely and the LTC3577-3/LTC3577-4 will remember the last input of valid data that it received. Once all chips on the bus have been addressed and sent valid data, a global STOP can be sent and the LTC3577-3/LTC3577-4 will update their command latches with the data that they had received. I2C Bus Read Operation The bus master reads the status of the LTC3577-3/ LTC3577-4 with a START condition followed by the LTC3577-3/LTC3577-4 read address. If the read address matches that of the LTC3577-3/LTC3577-4, the LTC3577-3/ LTC3577-4 return an acknowledge. Following the acknowledgement of their read address, the LTC3577-3/LTC3577-4 return one bit of status information for each of the next 8 clock cycles. A STOP command is not required for the bus read operation. I2C Input Data There are 4 bytes of data that can be written to on the LTC3577-3/LTC3577-4. The bytes are accessed through the sub-addresses 0x00 to 0x03. At first power application (VBUS, WALL or BAT) all bits default to 0. Additionally all bits are cleared to 0 when DVCC drops below its undervoltage lock out or if the pushbutton enters the power down (PDN) state. Table 8 shows the first byte of data that can be written to at sub-address 0x00. This byte of data is referred to as the "buck control register".
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LTC3577-3/LTC3577-4 OPERATION
Table 8. Buck Control Register
BUCK CONTROL REGISTER BIT B0 B1 B2 B3 B4 B5 B6 B7 NAME N/A N/A BK1BRST BK2BRST BK3BRST SLEWCTL1 SLEWCTL2 N/A ADDRESS: 00010010 SUB-ADDRESS: 00000000 FUNCTION Not Used--No Effect on Operation Not Used--No Effect on Operation Buck1 Burst Mode Enable Buck2 Burst Mode Enable Buck2 Burst Mode Enable Buck SW Slew Rate: 00 = 1ns, 01 = 2ns, 10 = 4ns, 11 = 8ns Not Used--No Effect on Operation
Bit B0 enables and disables the LED boost circuitry. Writing a 1 to B0 enables the LED boost circuitry, while writing a 0 disables the LED boost circuitry. Bits B1 and B2 are the LED gradation which sets the ramp up and down time of the LED current when enabled or disabled. The gradation function allows the LEDs to turn on/off gradually as opposed to an abrupt step. Bits B3 and B4 set the operating mode of the LED boost circuitry. The operating modes are: B4:B3 = 00 LED constant current (CC) boost operation; B4:B3 = 10 LED PWM boost operation; B4:B3 = 01 fixed high voltage (HV) output boost operation; B4:B3 = 11, not supported, do not use. See the "LED Backlight/Boost Operation" section for more information on the operating modes. Bits B5 and B6 set the PWM clock speed as shown in Table 5 of the "LED Backlight/Boost Operation" section. Bit B7 sets the slew rate of the LED boost SW pin. Setting B7 to 0 results in the fastest slew rate and provides the most efficient mode of operation. Setting B7 to 1 should only be used in cases where EMI due to SW slewing is an issue as the slower slew rate causes a loss in efficiency. See "LED Backlight/Boost Operation" section for more detailed operating information. Table 10 shows the third byte of data that can be written to at sub-address 0x02. This byte of data is referred to as the "LED DAC register". The LED current source utilizes a 6-bit 60dB exponential DAC. This DAC provides accurate current control from 20A to 20mA with approximately 1dB per step with ILED(FS) programmed to 20mA. The LED current can be approximated by the following equation: ILED = ILED(FS)
DAC-63 3* 63 * 10
Bits B2, B3, and B4 set the operating modes of the step-down switching regulators (bucks). Writing a 1 to any of these three registers will put that respective buck converter in the high efficiency Burst Mode of operation, while a 0 will enable the low noise "pulse-skipping" mode of operation. The B5 and B6 bits adjust the slew rate of all SW pins together so they all slew at the same rate. It is recommended that the fastest slew rate (B6:B5 = 00) be used unless EMI is an issue in the application as slower slew rates cause reduced efficiency. Table 9 shows the second byte of data that can be written to at sub-address 0x01. This byte of data is referred to as the "LED control register".
Table 9. I2C LED Control Register
LED CONTROL REGISTER BIT B0 B1 B2 B3 B4 B5 B6 B7 NAME EN GR2 GR1 MD1 MD2 PWMC1 PWMC2 SLEWLED ADDRESS: 00010010 SUB-ADDRESS: 00000001 FUNCTION Enable: 1 = Enable 0 = Off Gradation GR[2:1]: 00 = 15ms, 01 = 460ms, 10 = 930ms, 11 = 1.85 Seconds Mode MD[2:1]: 00 = CC Boost, 10 = PWM Boost; 01 = HV Boost, PWM CLK PWMC[2:1]: 00 = 8.77kHz, 01 = 4.39kHz, 10 = 2.92kHz, 11 = 2.19kHz LED SW Slew Rate: 0/1 = Fast/Slow
where DAC is the decimal value programmed into the I2C "LED DAC register". For example with ILED(FS) = 20mA and DAC[5:0] = 101010 (42 decimal) ILED equates to 2mA.
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LTC3577-3/LTC3577-4 OPERATION
Table 10. I2C LED DAC Register
LED DAC REGISTER BIT B0 B1 B2 B3 B4 B5 B6 B7 NAME DAC[0] DAC[1] DAC[2] DAC[3] DAC[4] DAC[5] N/A N/A Not Used--No Effect On Operation Not Used--No Effect On Operation ADDRESS: 00010010 SUB-ADDRESS: 00000010 FUNCTION 6-Bit Log DAC Code
I2C Output Data One status byte may be read from the LTC3577-3/ LTC3577-4 as shown in Table 12. A 1 read back in the any of the bit positions indicates that the condition is true. For example, 1 read back from bit A3 indicate that LDO1 is enabled and regulating correctly. A status read from the LTC3577-3/LTC3577-4 captures the status information when the LTC3577-3/LTC3577-4 acknowledge its read address.
Table 12. I2C READ Register
STATUS REGISTER BIT A0 A1 A2 A3 A4 A5 A6 A7 NAME CHARGE STAT[0] STAT[1] PGLDO[1] PGLDO[2] PGBCK[1] PGBCK[2] PGBCK[3] ADDRESS: 00010011 SUB-ADDRESS: None FUNCTION Charge Status (1 = Charging) STAT[1:0]; 00 = No Fault 01 = TOO COLD/HOT 10 = BATTERY OVERTEMP 11 = BATTERY FAULT LDO1 Power Good LDO2 Power Good Buck1 Power Good Buck2 Power Good Buck3 Power Good
Table 11 shows the final byte of data that can be written to at sub-address 0x03. This byte of data is referred to as the "LED PWM register". See the "LED PWM vs Constant Current Operation" section for detailed information on how to set the values of this register.
Table 11. LED PWM Register
LED PWM REGISTER BIT B0 B1 B2 B3 B4 B5 B6 B7 NAME PWMDEN[0] PWMDEN[1] PWMDEN[2] PWMDEN[3] PWMNUM[0] PWMNUM[1] PWMNUM[2] PWMNUM[3] PWM NUMERATOR ADDRESS: 00010010 SUB-ADDRESS: 00000011 FUNCTION PWM DENOMINATOR
Bit A7 shows the power good status of Buck3. A 1 indicates that Buck3 is enabled and is regulating correctly. A 0 indicates that either Buck3 is not enabled, or that the Buck3 is enabled, but is out of regulation by more than 8%. Bit A6 shows the power good status of Buck2. A 1 indicates that Buck2 is enabled and is regulating correctly. A 0 indicates that either Buck2 is not enabled, or that the Buck2 is enabled, but is out of regulation by more than 8%.
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LTC3577-3/LTC3577-4 OPERATION
Bit A5 shows the power good status of Buck1. A 1 indicates that Buck1 is enabled and is regulating correctly. A 0 indicates that either Buck1 is not enabled, or that the Buck1 is enabled, but is out of regulation by more than 8%. Bit A4 shows the power good status of LDO2. A 1 indicates that LDO2 is enabled and is regulating correctly. A 0 indicates that either LDO2 is not enabled, or that the LDO2 is enabled, but is out of regulation by more than 8%. Bit A3 shows the power good status of LDO1. A 1 indicates that LDO1 is enabled and is regulating correctly. A 0 indicates that either LDO1 is not enabled, or that the LDO1 is enabled, but is out of regulation by more than 8%. Bits A2 and A1 indicate the fault status of the charger measurement circuit and are decoded in Table 12. The "too cold/hot" state indicates that the thermistor temperature is out of the valid charging range (either below 0C or above 40C for a curve 1 thermistor) and that charging has paused until the battery returns to valid charging temperature. The battery overtemp state indicates that the battery's thermistor has reached a critical temperature (about 50C for a curve 1 thermistor) and that long-term battery capacity may be seriously compromised if the condition persists. The battery fault state indicates that an attempt was made to charge a low battery (typically < 2.85V) but that the low voltage condition persisted for more than 1/2 hour. In this case charging has terminated. Bit A0 indicates the status of the battery charger. A 1 indicates that the charger is enabled and is in the constant-current charge state. In this case the battery is being charged unless the NTC thermistor is outside its valid charge range in which case charging is temporarily suspended but not complete. Charging will continue once the battery has returned to a valid charging temperature. A 0 in bit A0 indicates that charger has reached end-ofcharge (hC/10) and is near VFLOAT or that charging has been terminated. Charging can be terminated by reaching the end of the charge timer or by a battery fault as described previously. I2C Write Register Map (see "I2C Input Data" section for more details, all registers default to 0 when reset)
BUCK CONTOL REGISTER BIT NAME B0 N/A B1 N/A B2 BK1BRST B3 BK2BRST B4 BK3BRST B5 SLEWCTL1 B6 SLEWCTL2 B7 N/A LED CONTROL REGISTER BIT NAME B0 EN B1 GR2 B2 GR1 B3 MD1 B4 MD2 B5 PWMC1 B6 PWMC2 B7 SLEWLED ADDRESS: 00010010 SUB-ADDRESS: 00000000 FUNCTION Not Used--No Effect On Operation Not Used--No Effect On Operation Buck1 Burst Mode Enable Buck2 Burst Mode Enable Buck2 Burst Mode Enable Buck SW Slew Rate: 00 = 1ns, 01 = 2ns, 10 = 4ns, 11 = 8ns Not Used--No Effect On Operation ADDRESS: 00010010 SUB-ADDRESS: 00000001 FUNCTION Enable: 1= Enable 0 = Off Gradation GR[2:1]: 00 = 15ms, 01 = 460ms, 10 = 930ms, 11 = 1.85 Seconds Mode MD[2:1]: 00 = CC Boost, 10 = PWM Boost, 01 = HV Boost PWM CLK PWMC[2:1]: 00 = 8.77kHz, 01 = 4.39kHz, 10 = 2.92kHz, 11 = 2.19kHz LED SW Slew Rate: 0/1 = Fast/Slow ADDRESS: 00010010 SUB-ADDRESS: 00000010 FUNCTION 6-Bit Log DAC Code
LED DAC REGISTER BIT NAME B0 DAC[0] B1 DAC[1] B2 DAC[2] B3 DAC[3] B4 DAC[4] B5 DAC[5] B6 N/A B7 N/A
Not Used--No Effect On 0peration Not Used--No Effect On 0peration ADDRESS: 00010010 SUB-ADDRESS: 00000011 FUNCTION PWM DENOMINATOR
LED PWM REGISTER BIT NAME B0 PWMDEN[0] B1 PWMDEN[1] B2 PWMDEN[2] B3 PWMDEN[3] B4 PWMNUM[0] B5 PWMNUM[1] B6 PWMNUM[2] B7 PWMNUM[3]
PWM NUMERATOR
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LTC3577-3/LTC3577-4 OPERATION
PUSHBUTTON INTERFACE OPERATION State Diagram/Operation Figure 13 shows the LTC3577-3/LTC3577-4 pushbutton state diagram. Upon first application of power (VBUS, WALL or BAT) an internal power-on reset (POR) signal places the pushbutton circuitry into the power-off (POFF) state. The following events cause the state machine to transition out of POFF into the power-up (PUP) state: 1) ON input low for 50ms (PB50MS) 2) PWR_ON input going high (PWR_ON) Upon entering the PUP state, the pushbutton circuitry will sequence up LDO2, Buck1 and Buck2 in that order. The LED backlight is enabled via I2C and does not take part in the power-up sequence of the pushbutton. One second after entering the PUP state, the pushbutton circuitry will transition into the power-on (PON) state. Note that the PWR_ON input must be brought high before entering the PON state if the part is to remain in the PON state. Buck3 can be enabled through the EN3 input once the pushbutton is in the PUP or PON states. PWR_ON going low, or VOUT dropping to its undervoltage lockout (VOUT UVLO) threshold will cause the state machine to leave the PON state and enter the power-down (PDN) state. The PDN state resets the I2C registers effectively shutting down the LED backlight as well as disabling Buck1, Buck2 and LDO2 together. Buck3 is also disabled in the PDN and POFF states. The one second delay before leaving the power-down state allows the supplies to power down completely before they can be re-enabled. PBSTAT Operation PBSTAT goes low 50ms after the initial pushbutton application (ON low) and will stay low for 50ms minimum. PBSTAT will go high coincident with ON going high unless ON goes high before the 50ms minimum low time. Hard Reset and PGOOD Operation The hard reset event is generated by pressing and holding the pushbutton (ON input low) for 14 seconds. For a valid hard reset event to occur the initial pushbutton application must start in the PUP or PON state. This avoids causing a hard reset from occurring if the user hangs on the pushbutton during initial power up. If a valid hard reset event is present then the PGOOD output will transition low for about 1.8ms to allow the microprocessor to reset. The hard reset event does not affect the operating state or regulator operation. The PGOOD pin is an open-drain output used to indicate that Buck1, Buck2 and LDO1 are enabled and have reached their final regulation voltage. A 230ms delay is included from the time Buck1, Buck2 and LDO1 reach 92% of their regulation value to allow a system controller ample time to reset itself. PGOOD is an open-drain output and requires a pull-up resistor to an appropriate power source. Optimally the pull-up resistor is connected to the output of Buck1, Buck2 or LDO2 so that power is not dissipated while the regulators are disabled. Pushbutton Operation and VOUT UVLO As stated earlier VOUT dropping to its UVLO threshold will cause the pushbutton to leave the power-on state and enter the power-down state, thus powering down Buck1, Buck2, Buck3, LDO2 and the LED backlight. Additionally, LDO1 is disabled when in UVLO. Thus, all LTC3577-3/LTC3577-4 supplies are disabled and remain disabled as long as the VOUT UVLO condition exists. It is not possible to power up any of the LTC3577-3/LTC3577-4 generated supplies while VOUT is below the VOUT UVLO threshold.
PUP PB50ms + PWR_ON 1SEC
POR
POFF
PON UVLO + PWR_ON PDN
35773 F13
1SEC
Figure 13. Pushbutton State Diagram
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LTC3577-3/LTC3577-4 OPERATION
Power-Up via Pushbutton Timing The timing diagram, Figure 14, shows the LTC3577-3/ LTC3577-4 powering up through application of the external pushbutton. For this example the pushbutton circuitry starts in the POFF state with VOUT not in UVLO and Buck1, Buck2 and LDO2 disabled. Pushbutton application (ON low) for 50ms transitions the pushbutton circuitry into the PUP state which sequences up LDO2, Buck1 and Buck2 in that order. PWR_ON must be driven high before the 1 second PUP period is over to keep supplies up. If PWR_ON is low or goes low after the 1 second PUP period Buck1, Buck2, and LDO2 will be shut down together. PGOOD is asserted once Buck1, Buck2 and LDO1 are within 8% of their regulation voltage for 230ms. Buck3 and LED backlight can be enabled and disabled at any time via EN3 or I2C once in the PUP or PON states. The PWR_ON input can be driven via a P/C or by one of the sequenced outputs through a high impedance (100k typ). PBSTAT goes low 50ms after the initial pushbutton application and will stay low for 50ms minimum. PBSTAT will go high coincident with ON going high unless ON goes high before the 50ms minimum low time.
VOUT UVLO ON (PB) 50ms PBSTAT LDO2 14ms BUCK1 BUCK2 230ms PGOOD 1 SEC PWR_ON STATE POFF PUP PON
35773 F14
Power-Up via PWR_ON Timing The timing diagram, Figure 15, shows the LTC3577-3/ LTC3577-4 powering up by driving PWR_ON high. For this example the pushbutton circuitry starts in the POFF state with VOUT not in UVLO and Buck1, Buck2 and LDO2 disabled. 50ms after PWR_ON goes high the pushbutton circuitry transitions into the PUP state which sequences up LDO2, Buck1 and Buck2 in that order. PWR_ON must be driven high before the 1 second PUP period is over to keep supplies up. If PWR_ON is low or goes low after the 1 second PUP period Buck1, Buck2 and LDO2 will be shut down together. PGOOD is asserted once Buck1, Buck2 and LD01 are within 8% of their regulation voltage for 230ms. Buck3 and LED backlight can be enabled and disabled at any time via EN3 or I2C once in the PUP or PON states. Powering up via PWR_ON is useful for applications containing an always on microcontroller. This allows the microcontroller to power the application up and down for house keeping and other activities outside the user's control.
VOUT UVLO ON (PB) PBSTAT 1 SEC PWR_ON 50ms LDO2 14ms BUCK1 BUCK2 230ms PGOOD STATE POFF PUP
35773 F15
PON
Figure 14. Power-Up via Pushbutton
Figure 15. Power-Up via PWR_ON
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LTC3577-3/LTC3577-4 OPERATION
Power Down via Pushbutton Timing The timing diagram, Figure 16, shows the LTC3577-3/ LTC3577-4 powering down by C/P control. For this example the pushbutton circuitry starts in the PON state with VOUT not in UVLO and Buck1, Buck2 and LDO2 enabled. In this case the pushbutton is applied (ON low) for at least 50ms, which generates a low impedance on the PBSTAT output. After receiving the PBSTAT the C/P will drive the PWR_ON input low. 50ms after PWR_ON goes low the pushbutton circuitry will enter the PDN state. Buck1, Buck2 and LDO2 are disabled together upon entering the PDN state. After entering the PDN state, a 1 second wait time is initiated before entering the POFF state. During this 1 second time ON and PWR_ON inputs are ignored to allow all LTC3577-3/LTC3577-4 generated supplies to go low. Upon entering the PDN state Buck3 is disabled and LED backlight I2C registers are cleared effectively disabling the backlight. The LED backlight can be disabled via I2C prior to entering the PDN state if desired. Holding ON low through the 1 second power-down period will not cause a power-up event at end of the 1second period. The ON input must be brought high following the power-down event and then go low again to establish a valid power-up event.
VOUT UVLO ON (PB) 50ms PBSTAT C/P CONTROL PWR_ON 50ms BUCK1 BUCK2 LDO2 PGOOD STATE PON PDN POFF
35773 F16
VOUT UVLO Power-Down Timing If VOUT drops below the VOUT UVLO threshold, the pushbutton circuitry will transition from the PON state to the PDN state. Buck1, Buck2 and LDO2 are disabled together upon entering the PDN state. After entering the PDN state, a 1 second wait time is initiated before entering the POFF state. During this 1 second time ON and PWR_ON inputs are ignored to allow all LTC3577-3/LTC3577-4 generated supplies to go low. Upon entering the PDN state the Buck3 is disabled and LED backlight I2C registers are cleared effectively disabling the backlight. LDO1 is also disabled by the VOUT UVLO and stays disabled as long as the VOUT UVLO condition remains. Note that it is not possible to sequence any of the supplies up while the VOUT UVLO condition exists. LDO1 will be re-enabled when the VOUT UVLO condition is removed. The other supplies will remain disabled until a valid power-up pushbutton event takes place.
VOUT UVLO 1 SEC ON (PB) LDO1 PBSTAT PWR_ON BUCK1 1 SEC BUCK2 LDO2 PGOOD STATE PON PDN POFF
35773 F17
Figure 17. VOUT UVLO Power Down
Figure 16. Power Down via Pushbutton
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LTC3577-3/LTC3577-4 OPERATION
Hard Reset Timing Hard reset provides a way to reset the C/P in case of a software lockup. To initiate a hard reset, the pushbutton is pressed (ON low) and held for greater than 14 seconds. Once the hard reset time is exceeded the PGOOD input will go low for 1.8ms which resets the C/P Operation . of the enabled supplies is not effected by the hard reset event. All enabled supplies should remain in regulation and operating correctly assuming specified operating conditions are met (i.e., no shorted supplies, etc). There are only two methods to power down the LTC3577-3/ LTC3577-4 supplies: 1) PWR_ON goes low; 2) VOUT drops below the VOUT UVLO threshold. If the C/P controls shutdown by bringing PWR_ON low, it is possible that the application can hang with all supplies enabled if the C/P fails to reset correctly on hard reset. In this case the battery will continue to be drained until VOUT drops below the VOUT UVLO threshold, or the user intervenes to shut down the application manually. The application can be shut down manually by removing the battery and any external supplies, or by providing a suicide button that will bring PWR_ON low when pressed.
VOUT UVLO >14 SEC ON (PB) 50ms PBSTAT PWR_ON BUCK1 BUCK2 LDO1 14 SEC PGOOD STATE PON 1.8ms
35773 F18
Power-Up Sequencing Figure 19 shows the actual power-up sequencing of the LTC3577-3/LTC3577-4. Buck1, Buck2 and LDO2 are all initially disabled (0V). Once the pushbutton has been applied (ON low) for 50ms PBSTAT goes low and LDO2 is enabled. Once enabled, LDO2 slews up and enters regulation. The actual slew rate is controlled by the soft-start function of LDO2 which ramps the LDO reference up over a 200s period typically. After a 14ms delay from LDO2 being enabled, Buck1 is enabled and slews up into regulation. When Buck1 is within about 8% of final regulation, Buck2 is enabled and slews up into regulation. The bucks also have a soft-start function to limit inrush current at startup. 230ms after Buck2 is within 8% of final regulation, the PGOOD output will go high impedance (not shown in Figure 19). The regulators in Figure 19 are slewing up with nominal output capacitors and no load. Adding a load or increasing output capacitance on any of the outputs will reduce the slew rate and lengthen the time it takes the regulator to get into regulation.
1 PBSTAT 0 LDO2 1V/DIV 0V BUCK1 1V/DIV 0V BUCK2 2V/DIV 0V 2ms/DIV
35773 F19
Figure 19. Power-Up Sequencing
Figure 18. Hard Reset Timing
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LTC3577-3/LTC3577-4 OPERATION
LAYOUT AND THERMAL CONSIDERATIONS Printed Circuit Board Power Dissipation In order to be able to deliver maximum charge current under all conditions, it is critical that the exposed ground pad on the backside of the LTC3577-3/LTC3577-4 package be soldered to a ground plane on the board. Correctly soldered to 2500mm2 ground plane on a double-sided 1oz copper board the LTC3577-3/LTC3577-4 have a thermal resistance (JA) of approximately 45C/W. Failure to make good thermal contact between the Exposed Pad on the backside of the package and a adequately sized ground plane will result in thermal resistances far greater than 45C/W. The conditions that cause the LTC3577-3/LTC3577-4 to reduce charge current due to the thermal protection feedback can be approximated by considering the power dissipated in the part. For high charge currents with a wall adapter applied to VOUT , the LTC3577-3/LTC3577-4 power dissipation is approximately: PD = (VOUT - BAT) * IBAT + PDREGS where PD is the total power dissipated, VOUT is the supply voltage, BAT is the battery voltage and IBAT is the battery charge current. PDREGS is the sum of power dissipated on-chip by the step-down switching, LDO and LED boost regulators. The power dissipated by a step-down switching regulator can be estimated as follows: PD(SWx ) = OUTx * IOUTx * where LDOx is the programmed output voltage, VINLDOx is the LDO supply voltage and ILDOx is the LDO output load current. Note that if the LDO supply is connected to one of the buck output, then its supply current must be added to the buck regulator load current for calculating the buck power loss. The power dissipated by the LED boost regulator can be estimated as follows: BOOST PDLED = ILED * 0.3V + RNSWON * ILED * V - 1
OUT 2
where BOOST is the output voltage driving the top of the LED string, RNSWON is the on-resistance of the SW N-FET (typically 330m), ILED is the LED programmed current sink. Thus the power dissipated by all regulators is: PDREGS = PDSW1 + PDSW2 + PDSW3 + PDLDO1 + PDLDO2 + PDLED It is not necessary to perform any worst-case power dissipation scenarios because the LTC3577-3/LTC3577-4 will automatically reduce the charge current to maintain the die temperature at approximately 110C. However, the approximate ambient temperature at which the thermal feedback begins to protect the IC is: TA = 110C - PD * JA Example: Consider the LTC3577-3/LTC3577-4 operating from a wall adapter with 5V (VOUT) providing 1A (IBAT) to charge a Li-Ion battery at 3.3V (BAT). Also assume PDREGS = 0.3W, so the total power dissipation is: PD = (5V - 3.3V) * 1A + 0.3W = 2W The ambient temperature above which the LTC3577-3/ LTC3577-4 will begin to reduce the 1A charge current, is approximately TA = 110C - 2W * 45C/W = 20C
(
)
100 - Eff 100
where OUTx is the programmed output voltage, IOUTx is the load current and Eff is the % efficiency which can be measured or looked up on an efficiency table for the programmed output voltage. The power dissipated on chip by a LDO regulator can be estimated as follows: PDLDOx = (VINLDOx - LDOx) * ILDOx
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LTC3577-3/LTC3577-4 OPERATION
The LTC3577-3/LTC3577-4 can be used above 20C, but the charge current will be reduced below 1A. The charge current at a given ambient temperature can be approximated by: PD = Thus: JA - PD(REGS) VOUT - BAT 110C - TA = VOUT - BAT * IBAT + PD(REGS) JA AC current to the internal power MOSFETs and their drivers. It's important to minimizing inductance from these capacitors to the pins of the LTC3577-3/LTC3577-4. Connect VIN12 and VIN3 to VOUT through a short low impedance trace. 3. The switching power traces connecting SW1, SW2, and SW3 to their respective inductors should be minimized to reduce radiated EMI and parasitic coupling. Due to the large voltage swing of the switching nodes, sensitive nodes such as the feedback nodes (FBx, LDOx_FB and LED_OV) should be kept far away or shielded from the switching nodes or poor performance could result. 4. Connections between the step-down switching regulator inductors and their respective output capacitors should be kept should be kept as short as possible. The GND side of the output capacitors should connect directly to the thermal ground plane of the part. 5. Keep the buck feedback pin traces (FB1, FB2, and FB3) as short as possible. Minimize any parasitic capacitance between the feedback traces and any switching node (i.e. SW1, SW2, SW3, and logic signals). If necessary shield the feedback nodes with a GND trace. 6. Connections between the LTC3577-3/LTC3577-4 power path pins (VBUS and VOUT) and their respective decoupling capacitors should be kept as short as possible. The GND side of these capacitors should connect directly to the ground plane of the part. 7. The boost converter switching power trace connecting SW to the inductor should be minimized to reduce radiated EMI and parasitic coupling. Due to the large voltage swing of the SW node, sensitive nodes such as the feedback nodes (FBx, LDOx_FB and LED_OV) should be kept far away or shielded from this switching node or poor performance could result.
(
)
(110C - TA )
IBAT =
Consider the above example with an ambient temperature of 55C. The charge current will be reduced to approximately: 110C - 55C - 0.3W 45C/W IBAT = 5V - 3.3V IBAT = 1.22 - 0.3W = 542mA 1.7 V
Printed Circuit Board Layout When laying out the printed circuit board, the following list should be followed to ensure proper operation of the LTC3577-3/LTC3577-4: 1. The Exposed Pad of the package (Pin 45) should connect directly to a large ground plane to minimize thermal and electrical impedance. 2. The step-down switching regulator input supply pins (VIN12 and VIN3) and their respective decoupling capacitors should be kept as short as possible. The GND side of these capacitors should connect directly to the ground plane of the part. These capacitors provide the
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LTC3577-3/LTC3577-4 TYPICAL APPLICATION
5V WALL ADAPTER 4 13 8 41 Si2333DS VOUT SYSTEM LOAD
WALL ACPR OVGATE OVSENSE
30 VINLDO2 27 VINLDO1 39 VOUT VIN12 32
10F 2.2F 1k
USB 10F 2k
40
VBUS
36
2.1k 43 DVCC SDA SCL C/P EXTPWR PBSTAT PWR_ON KILL EN3 RST ILIM0 ILIM1 PUSHBUTTON 15 VLDO1 3.3V 150mA 28 1F 324k 1.02M 23 29 1F 464k 348k 24 499k 499k 10 11 12 499k 42 16 14
2.2F LTC3577-3/ 6 LTC3577-4 VIN3 44 CHRG 37 PROG IDGATE 38 BAT CLPROG 34 100k NTCBIAS 35 DVCC NTC SDA SCL 18,19,20 SW 9 10M EXTPWR LED_OV PBSTAT PWR_ON ILED LED_FS 22 3 20k
Si2333DS (OPT)
+
100k NTC
BAT Li-Ion 20F 10H ZLLS400 VBOOST 1F 50V
22nF 50V
10-LED BACKLIGHT
17 EN3 1 ILIM0 2 ILIM1 ON LDO1 LDO1_FB LDO2 LDO2_FB GND 45
SW1 FB1
33 26
4.7H 10pF 806k 10F
VOUT1 1.8V 500mA
649k
SW2 FB2 SW3 FB3 PGOOD
31 25 5 7 21
4.7H 10pF 3.3H 10pF 232k 10F 1.02M 10F
VOUT2 3.3V 500mA
324k
VLDO2 1.4V 150mA
VOUT3 1.2V 800mA
464k
100k
35773 TA02
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LTC3577-3/LTC3577-4 TYPICAL APPLICATION
5V WALL ADAPTER Si2333DS D3 5.6V R1 500k 6.2k OPTIONAL OVERVOLTAGE/ REVERSE VOLTAGE PROTECTION USB 10F 2k 40 13 8 Si2306BDS Si2333DS VOUT SYSTEM LOAD 4 41 30 10F 39 2.2F VBUS VIN12 2.2F LTC3577-3/ 6 LTC3577-4 VIN3 44 CHRG 37 PROG IDGATE 38 BAT CLPROG 34 100k NTCBIAS 35 DVCC NTC SDA SCL 18,19,20 SW 6M 9 EXTPWR LED_OV PBSTAT PWR_ON ILED LED_FS 17 EN3 1 ILIM0 2 ILIM1 PUSHBUTTON 15 VLDO1 2.5V 150mA 28 1F 470k 1.00M 23 29 1F 464k 115k 24 LDO2_FB GND 45 100k
35773 TA03
WALL ACPR OVGATE OVSENSE VOUT VINLDO1
32
1k
36
Si2333DS (OPT)
2.1k 43 DVCC SDA SCL C/P EXTPWR PBSTAT PWR_ON KILL EN3 RST ILIM0 ILIM1 499k 499k 10 11 12 499k 42 16 14
+
100k NTC
BAT Li-Ion 20F 10H ZLLS400 VBOOST 1F 50V
22 3 20k
22nF 50V
6-LED BACKLIGHT
SW1 FB1 VINLDO2 SW2 FB2 SW3 FB3 PGOOD
33 26 30 31 25 5 7 21
4.7H 10pF 1.02M 10F
VOUT1 3.3V 500mA
324k
ON LDO1 LDO1_FB LDO2
4.7H 10pF 3.3H 10pF 402k 10F 806k 10F
VOUT2 1.8V 500mA
649k
VLDO2 1.0V 150mA
VOUT3 1.3V 800mA
649k
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50
LTC3577-3/LTC3577-4 PACKAGE DESCRIPTION
UFF Package Variation: UFFMA 44-Lead Plastic QFN (4mm x 7mm)
(Reference LTC DWG # 05-08-1762 Rev O)
1.48 0.05 0.70 0.05
4.50 0.05 3.10 0.05 2.40 REF
2.56 0.05
1.70 0.05 2.02 0.05 2.76 0.05 0.98 0.05
2.64 0.05
PACKAGE OUTLINE 0.20 0.05 5.60 REF 6.10 0.05 7.50 0.05 0.40 BSC
RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 0.05 0.00 - 0.05
4.00 0.10
2.40 REF 43 44
PIN 1 NOTCH R = 0.30 TYP OR 0.35 45 CHAMFER
0.40 0.10 1 2 PIN 1 TOP MARK (SEE NOTE 6) 2.64 0.10 2.56 0.10 7.00 0.10 5.60 REF 1.70 0.10 R = 0.10 TYP 0.74 0.10 R = 0.10 TYP 0.74 0.10
(UFF44MA) QFN REF O 1107
2.76 0.10
0.200 REF
R = 0.10 TYP 0.98 0.10
0.20 0.05 0.40 BSC
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
51
LTC3577-3/LTC3577-4 RELATED PARTS
PART NUMBER LTC3455 DESCRIPTION Dual DC/DC Converter with USB Power Manager and Li-Ion Battery Charger COMMENTS Seamless Transition Between Input Power Sources: Li-Ion Battery, USB and 5V Wall Adapter. Two High Efficiency DC/DC Converters: Up to 96%. Full Featured Li-Ion Battery Charger with Accurate USB Current Limiting (500mA/100mA). Pin Selectable Burst Mode Operation. Hot SwapTM Output for SDIO and Memory Cards. 24-Lead 4mm x 4mm QFN Package Seamless Transition Between 2-Cell Battery, USB and AC Wall Adapter Input Power Sources. Main Output: Fixed 3.3V Output, Core Output: Adjustable from 0.8V to VBATT(MIN). Hot Swap Output for Memory Cards. Power Supply Sequencing: Main and Hot Swap Accurate USB Current Limiting. High Frequency Operation: 1MHz. High Efficiency: Up to 92%. 24-Lead 4mm x 4mm QFN Package Maximizes Available Power from USB Port, Bat-Track, "Instant On" Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m Option, 3.3V/25mA Always-On LDO, Three Synchronous Buck Regulators, One 1A Buck-Boost Regulator, 4mm x 5mm QFN28 Package
LTC3456
2-Cell, Multi-Output DC/DC Converter with USB Power Manager
LTC3555
I2C Controlled High Efficiency USB Power Manager Plus Triple Step-Down DC/DC
LTC3556
High Efficiency USB Power Manager Plus Maximizes Available Power from USB Port, Bat-Track, "Instant On" Operation, 1.5A Max Dual Buck Plus Buck-Boost DC/DC Charge Current, 180m Ideal Diode with <50m Option, 3.3V/25mA Always-On LDO, Two 400mA Synchronous Buck Regulators, One 1A Buck-Boost Regulator, 4mm x 5mm QFN28 Package USB Power Manager with Li-Ion/Polymer Complete Multifunction ASSP: Linear Power Manager and Three Buck Regulaters Charger and Triple Synchronous Buck Charge Current Programmable up to 1.5A from Wall Adapter Input, Thermal Regulation Converter Synchronous Buck Efficiency: >95%, ADJ Outputs: 0.8V to 3.6V at 400mA/400mA/600mA Bat-Track Adaptive Output Control, 200m Ideal Diode, 4mm x 4mm QFN28 Package, "-1" version has 4.1V Float Voltage. Switching USB Power Manager with Li-Ion/Polymer Charger, 1A Buck-Boost Converter Plus LDO Switching USB Power Manager with Li-Ion/Polymer Charger, 1A Buck-Boost Converter Plus LDO, I2C Interface Highly Integrated Protable/Navigation PMIC Multifunction PMIC: Switchmode Power Manager and 1A Buck-Boost Regulator + LDO, Charge Current Programmable Up to 1.5A from Wall Adapter Input, Thermal Regulation Synchronous Buck-Boost Converters Efficiency: >95%, ADJ Output: Down to 0.8V at 1A, Bat-Track Adaptive Output Control, 180m Ideal Diode, 4mm x 4mm QFN24 Package Multifunction PMIC: Switchmode Power Manager and 1A Buck-Boost + LDO, I2C Interface, Charge Current Programmable up to 1.5A from Wall Adapter Input, Thermal Regulation Synchronous Buck-Boost Converters Efficiency: >95%, ADJ Output: down to 0.8V at 1A, Bat-Track Adaptive Output Control, 180m Ideal Diode, 4mm x 4mm QFN24 Package Complete Multifunction PMIC: Linear Power Manager and Three Buck Regulators, Charge Current Programmable up to 1.5A from Wall Adapter Input, Thermal Regulation, Synchronous Buck Converters Efficiency: >95%, ADJ Outputs: 0.8V to 3.6V at 800mA/ 500mA/500mA, Pushbutton Control, I2C Interface, 2x 150mA LDOs, Overvoltage Protection Bat-Track Adaptive Output Control, 200m Ideal Diode, 4mm x 7mm QFN44 Package, "-1" version has 4.1V Float Voltage. Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation, 200m Ideal Diode with <50m option, 4mm x 3mm DFN14 Package, "-1" version has 4.1V Float Voltage. Maximizes Available Power from USB Port, Bat-Track, "Instant On" Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m Option, 3.3V/25mA Always-On LDO, 4mm x 3mm DFN14 Package Maximizes Available Power from USB Port, Bat-Track, "Instant-On" Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m option, Automatic Charge Current Reduction Maintains 3.6V Minimum Vout, Battery charger disabled when all logic inputs are grounded, 3mm x 4mm DFN14 package Maximizes Available Power from USB Port, Bat-Track, "Instant-On" Operation, 1.5A Max Charge Current, 180m Ideal Diode with <50m option, Automatic Charge Current Reduction Maintains 3.6V Minimum Vout, 3mm x 4mm DFN14 package High VIN : 38V operating, 60V transient; 66V OVP Maximizes Available Power from USB . Port, Bat-Track, "Instant-On" Operation, 1.5A Max Charge Current from Wall, 600mA Charge Current from USB, 180m Ideal Diode with <50m option; 3mm x 4mm ultra-thin QFN20 package
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LTC3557/ LTC3557-1
LTC3566
LTC3567
LTC3577/ LTC3577-1
LTC4085/ LTC4085-1 LTC4088
USB Power Manager with Ideal Diode Controller and Li-Ion Charger High Efficiency USB Power Manager and Battery Charger High Efficiency USB Power Manager and Battery Charger with Regulated Output Voltage High Efficiency USB Power Manager and Battery Charger with Regulated Output Voltage USB-Compatible Switchmode Power Manager with OVP
LTC4088-1
LTC4088-2
LTC4098
Hot Swap is a trademark of Linear Technology Corporation.
52 Linear Technology Corporation
(408) 432-1900
LT 0709 REV A * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
FAX: (408) 434-0507 www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2009

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